]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
staging: media: tegra-video: tegra20: set correct maximum width and height
authorSvyatoslav Ryhel <clamor95@gmail.com>
Tue, 3 Mar 2026 08:42:31 +0000 (10:42 +0200)
committerHans Verkuil <hverkuil+cisco@kernel.org>
Thu, 19 Mar 2026 07:18:36 +0000 (08:18 +0100)
Maximum width and height for Tegra20 and Tegra30 is determined by
respective register field, rounded down to factor of 2, which is 8191U
rounded down to 8190U.

Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # tegra20, parallel camera
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
drivers/staging/media/tegra-video/tegra20.c

index aa9ff7fec4f9c5db721d8072f4206f8e16da8edf..b2e706fa727b3cfcd84fca777422902021107f05 100644 (file)
 
 #define TEGRA_VI_SYNCPT_WAIT_TIMEOUT                   msecs_to_jiffies(200)
 
-/* This are just good-sense numbers. The actual min/max is not documented. */
 #define TEGRA20_MIN_WIDTH      32U
+#define TEGRA20_MAX_WIDTH      8190U
 #define TEGRA20_MIN_HEIGHT     32U
-#define TEGRA20_MAX_WIDTH      2048U
-#define TEGRA20_MAX_HEIGHT     2048U
+#define TEGRA20_MAX_HEIGHT     8190U
 
 /* --------------------------------------------------------------------------
  * Registers