]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: rockchip: add node name for RK3588_PD_RKVDEC0/1 and RK3588_PD_VENC0/1
authorShawn Lin <shawn.lin@rock-chips.com>
Fri, 13 Feb 2026 02:35:12 +0000 (10:35 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 22 Feb 2026 22:28:49 +0000 (23:28 +0100)
Thus the board dts files could add property for these nodes.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1770950113-19802-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi

index 7fe9593d8c198f0d202ceb6e09a0fe57b98a04b1..4fb8888c281c8c7ce31e90e91abe1fd703804dd2 100644 (file)
                                #size-cells = <0>;
                                #power-domain-cells = <0>;
 
-                               power-domain@RK3588_PD_RKVDEC0 {
+                               pd_rkvdec0: power-domain@RK3588_PD_RKVDEC0 {
                                        reg = <RK3588_PD_RKVDEC0>;
                                        clocks = <&cru HCLK_RKVDEC0>,
                                                 <&cru HCLK_VDPU_ROOT>,
                                        pm_qos = <&qos_rkvdec0>;
                                        #power-domain-cells = <0>;
                                };
-                               power-domain@RK3588_PD_RKVDEC1 {
+                               pd_rkvdec1: power-domain@RK3588_PD_RKVDEC1 {
                                        reg = <RK3588_PD_RKVDEC1>;
                                        clocks = <&cru HCLK_RKVDEC1>,
                                                 <&cru HCLK_VDPU_ROOT>,
                                        pm_qos = <&qos_rkvdec1>;
                                        #power-domain-cells = <0>;
                                };
-                               power-domain@RK3588_PD_VENC0 {
+                               pd_venc0: power-domain@RK3588_PD_VENC0 {
                                        reg = <RK3588_PD_VENC0>;
                                        clocks = <&cru HCLK_RKVENC0>,
                                                 <&cru ACLK_RKVENC0>;
                                        #size-cells = <0>;
                                        #power-domain-cells = <0>;
 
-                                       power-domain@RK3588_PD_VENC1 {
+                               pd_venc1: power-domain@RK3588_PD_VENC1 {
                                                reg = <RK3588_PD_VENC1>;
                                                clocks = <&cru HCLK_RKVENC1>,
                                                         <&cru HCLK_RKVENC0>,