ASoC: mediatek: mt8183-afe-pcm: Support >32 bit DMA addresses

The AFE DMA hardware supports up to 34 bits for DMA addresses. This is
missing from the driver and prevents reserved memory regions from
working properly when the allocated region is above the 4GB line.

Fill in the related register offsets for each DAI, and also set the
DMA mask. Also fill in the LSB end register offsets for completeness.

Fixes: a94aec035a12 ("ASoC: mediatek: mt8183: add platform driver")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://patch.msgid.link/20250612074901.4023253-8-wenst@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
index 9b6b45c646e69ea5c0b51074fbd1454f99c066cf..7383184097a48d73787a373c0e2bc3cc3cfa4a35 100644 (file)
--- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
+++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
@@ -6,6 +6,7 @@
 // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
 
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/module.h>
 #include <linux/mfd/syscon.h>
 #include <linux/of.h>
@@ -432,6 +433,9 @@ static const struct snd_soc_component_driver mt8183_afe_pcm_dai_component = {
                .reg_ofs_base = AFE_##_id##_BASE,       \
                .reg_ofs_cur = AFE_##_id##_CUR,         \
                .reg_ofs_end = AFE_##_id##_END,         \
+               .reg_ofs_base_msb = AFE_##_id##_BASE_MSB,       \
+               .reg_ofs_cur_msb = AFE_##_id##_CUR_MSB,         \
+               .reg_ofs_end_msb = AFE_##_id##_END_MSB,         \
                .fs_reg = (_fs_reg),                    \
                .fs_shift = _id##_MODE_SFT,             \
                .fs_maskbit = _id##_MODE_MASK,          \
@@ -463,11 +467,17 @@ static const struct snd_soc_component_driver mt8183_afe_pcm_dai_component = {
 #define AFE_VUL12_BASE         AFE_VUL_D2_BASE
 #define AFE_VUL12_CUR          AFE_VUL_D2_CUR
 #define AFE_VUL12_END          AFE_VUL_D2_END
+#define AFE_VUL12_BASE_MSB     AFE_VUL_D2_BASE_MSB
+#define AFE_VUL12_CUR_MSB      AFE_VUL_D2_CUR_MSB
+#define AFE_VUL12_END_MSB      AFE_VUL_D2_END_MSB
 #define AWB2_HD_ALIGN_SFT      AWB2_ALIGN_SFT
 #define VUL12_DATA_SFT         VUL12_MONO_SFT
 #define AFE_HDMI_BASE          AFE_HDMI_OUT_BASE
 #define AFE_HDMI_CUR           AFE_HDMI_OUT_CUR
 #define AFE_HDMI_END           AFE_HDMI_OUT_END
+#define AFE_HDMI_BASE_MSB      AFE_HDMI_OUT_BASE_MSB
+#define AFE_HDMI_CUR_MSB       AFE_HDMI_OUT_CUR_MSB
+#define AFE_HDMI_END_MSB       AFE_HDMI_OUT_END_MSB
 
 static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
        MT8183_MEMIF(DL1, AFE_DAC_CON1, AFE_DAC_CON1),
@@ -764,6 +774,10 @@ static int mt8183_afe_pcm_dev_probe(struct platform_device *pdev)
        struct reset_control *rstc;
        int i, irq_id, ret;
 
+       ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(34));
+       if (ret)
+               return ret;
+
        afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL);
        if (!afe)
                return -ENOMEM;