ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node

MIPI CSI-2 is supported on the A83T with a dedicated controller that
covers both the protocol and D-PHY. It is connected to the only CSI
receiver with a fwnode graph link. Note that the CSI receiver supports
both this MIPI CSI-2 source and a parallel source.

An empty port with a label for the MIPI CSI-2 sensor input is also
defined for convenience.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20260518153339.619947-8-paulk@sys-base.io
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi
index 6f88d8764e6a3007fd6c929e0436329992d3668f..cc107c6030debc3c3e424c8c32cb0cb5f5354618 100644 (file)
--- a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi
@@ -1062,6 +1062,49 @@
                        clock-names = "bus", "mod", "ram";
                        resets = <&ccu RST_BUS_CSI>;
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       csi_in_mipi_csi2: endpoint {
+                                               remote-endpoint = <&mipi_csi2_out_csi>;
+                                       };
+                               };
+                       };
+               };
+
+               mipi_csi2: csi@1cb1000 {
+                       compatible = "allwinner,sun8i-a83t-mipi-csi2";
+                       reg = <0x01cb1000 0x1000>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CSI>,
+                                <&ccu CLK_CSI_SCLK>,
+                                <&ccu CLK_MIPI_CSI>,
+                                <&ccu CLK_CSI_MISC>;
+                       clock-names = "bus", "mod", "mipi", "misc";
+                       resets = <&ccu RST_BUS_CSI>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               mipi_csi2_in: port@0 {
+                                       reg = <0>;
+                               };
+
+                               mipi_csi2_out: port@1 {
+                                       reg = <1>;
+
+                                       mipi_csi2_out_csi: endpoint {
+                                               remote-endpoint = <&csi_in_mipi_csi2>;
+                                       };
+                               };
+                       };
                };
 
                hdmi: hdmi@1ee0000 {