x86/process: Clear hardware feedback history for AMD processors

Incorporate a mechanism within the context switching code to reset the
hardware history for AMD processors. Specifically, when a task is switched in,
the class ID is read and the hardware workload classification history of the
CPU firmware is reset. Then, the workload classification for the next running
thread is begun.

  [ bp: Massage commit message. ]

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/20250609200518.3616080-10-superm1@kernel.org

diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index b972bf72fb8b6839c68b2d0c0f865f85dfcb5185..52a5c03c353c8f8cad6134b0c20b5ac01a57656f 100644 (file)
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -707,6 +707,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
        /* Load the Intel cache allocation PQR MSR. */
        resctrl_arch_sched_in(next_p);
 
+       /* Reset hw history on AMD CPUs */
+       if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS))
+               wrmsrl(MSR_AMD_WORKLOAD_HRST, 0x1);
+
        return prev_p;
 }