#define OPTION_MASK_ISA2_USER_MSR_UNSET OPTION_MASK_ISA2_USER_MSR
#define OPTION_MASK_ISA2_AVX10_1_UNSET \
(OPTION_MASK_ISA2_AVX10_1_256 | OPTION_MASK_ISA2_AVX10_1_512 \
- | OPTION_MASK_ISA2_AVX10_2_256_UNSET | OPTION_MASK_ISA2_AVX10_2_512_UNSET)
-#define OPTION_MASK_ISA2_AVX10_2_256_UNSET OPTION_MASK_ISA2_AVX10_2_256
-#define OPTION_MASK_ISA2_AVX10_2_512_UNSET \
- (OPTION_MASK_ISA2_AVX10_2_512 | OPTION_MASK_ISA2_AMX_AVX512_UNSET)
+ | OPTION_MASK_ISA2_AVX10_2_UNSET)
+#define OPTION_MASK_ISA2_AVX10_2_UNSET \
+ (OPTION_MASK_ISA2_AVX10_2_256 | OPTION_MASK_ISA2_AVX10_2_512 \
+ | OPTION_MASK_ISA2_AMX_AVX512_UNSET)
#define OPTION_MASK_ISA2_AMX_AVX512_UNSET OPTION_MASK_ISA2_AMX_AVX512
#define OPTION_MASK_ISA2_AMX_TF32_UNSET OPTION_MASK_ISA2_AMX_TF32
#define OPTION_MASK_ISA2_AMX_TRANSPOSE_UNSET OPTION_MASK_ISA2_AMX_TRANSPOSE
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
}
- else
- {
- opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_2_256_UNSET;
- opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_256_UNSET;
- }
return true;
- case OPT_mavx10_2_512:
+ case OPT_mavx10_2:
if (value)
{
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_2_512_SET;
}
else
{
- opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_2_512_UNSET;
- opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_512_UNSET;
+ opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_2_UNSET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_UNSET;
}
return true;
ISA_NAMES_TABLE_ENTRY("usermsr", FEATURE_USER_MSR, P_NONE, "-musermsr")
ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_AVX10_1_256, "-mavx10.1-256")
ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_AVX10_1_512, "-mavx10.1-512")
- ISA_NAMES_TABLE_ENTRY("avx10.2", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2")
+ ISA_NAMES_TABLE_ENTRY("avx10.2", FEATURE_AVX10_2_512, P_NONE, "-mavx10.2")
ISA_NAMES_TABLE_ENTRY("avx10.2-256", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2-256")
- ISA_NAMES_TABLE_ENTRY("avx10.2-512", FEATURE_AVX10_2_512, P_NONE, "-mavx10.2-512")
+ ISA_NAMES_TABLE_ENTRY("avx10.2-512", FEATURE_AVX10_2_512, P_NONE, NULL)
ISA_NAMES_TABLE_ENTRY("amx-avx512", FEATURE_AMX_AVX512, P_NONE,
"-mamx-avx512")
ISA_NAMES_TABLE_ENTRY("amx-tf32", FEATURE_AMX_TF32, P_NONE, "-mamx-tf32")
isa_names_table[i].option, NULL);
}
/* Never push -mno-avx10.1-{256,512} under -march=native to
- avoid unnecessary warnings when building librarys. */
+ avoid unnecessary warnings when building libraries.
+ Never push -mno-avx10.x-256 under -march=native since
+ there are no such options. */
else if (isa_names_table[i].feature != FEATURE_AVX10_1_256
&& isa_names_table[i].feature != FEATURE_AVX10_1_512
+ && isa_names_table[i].feature != FEATURE_AVX10_2_256
&& check_avx512_features (cpu_model, cpu_features2,
isa_names_table[i].feature))
options = concat (options, neg_option,
IX86_ATTR_ISA ("usermsr", OPT_musermsr),
IX86_ATTR_ISA ("avx10.1-256", OPT_mavx10_1_256),
IX86_ATTR_ISA ("avx10.1-512", OPT_mavx10_1_512),
- IX86_ATTR_ISA ("avx10.2", OPT_mavx10_2_256),
IX86_ATTR_ISA ("avx10.2-256", OPT_mavx10_2_256),
- IX86_ATTR_ISA ("avx10.2-512", OPT_mavx10_2_512),
+ IX86_ATTR_ISA ("avx10.2", OPT_mavx10_2),
+ IX86_ATTR_ISA ("avx10.2-512", OPT_mavx10_2),
IX86_ATTR_ISA ("amx-avx512", OPT_mamx_avx512),
IX86_ATTR_ISA ("amx-tf32", OPT_mamx_tf32),
IX86_ATTR_ISA ("amx-transpose", OPT_mamx_transpose),
and AVX10.1-512 built-in functions and code generation.
mavx10.2-256
-Target Mask(ISA2_AVX10_2_256) Var(ix86_isa_flags2) Save
+Target RejectNegative Mask(ISA2_AVX10_2_256) Var(ix86_isa_flags2) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2,
AVX10.1 and AVX10.2 built-in functions and code generation.
-mavx10.2-512
+mavx10.2
Target Mask(ISA2_AVX10_2_512) Var(ix86_isa_flags2) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2,
AVX10.1-512 and AVX10.2-512 built-in functions and code generation.
-mavx10.2
-Target Alias(mavx10.2-256)
+mavx10.2-512
+Target RejectNegative Alias(mavx10.2)
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2,
-AVX10.1 and AVX10.2 built-in functions and code generation.
+AVX10.1-512 and AVX10.2-512 built-in functions and code generation.
mamx-avx512
Target Mask(ISA2_AMX_AVX512) Var(ix86_isa_flags2) Save
@cindex @code{target("avx10.2")} function attribute, x86
@item avx10.2
@itemx no-avx10.2
-Enable/disable the generation of the AVX10.2 instructions.
+Enable the generation of the AVX10.2 instructions with 512 bit support.
+Disable the generation of the AVX10.2 instructions.
@cindex @code{target("avx10.2-256")} function attribute, x86
@item avx10.2-256
-@itemx no-avx10.2-256
-Enable/disable the generation of the AVX10.2 instructions.
+Enable the generation of the AVX10.2 instructions with 256 bit support.
@cindex @code{target("avx10.2-512")} function attribute, x86
@item avx10.2-512
-@itemx no-avx10.2-512
-Enable/disable the generation of the AVX10.2 512 bit instructions.
+Enable the generation of the AVX10.2 instructions with 512 bit support.
@cindex @code{target("amx-avx512")} function attribute, x86
@item amx-avx512
Target supports the execution of @code{avx10.1-512} instructions.
@item avx10.2
-Target supports the execution of @code{avx10.2} instructions.
+Target supports the execution of @code{avx10.2-512} instructions.
@item avx10.2-256
-Target supports the execution of @code{avx10.2} instructions.
+Target supports the execution of @code{avx10.2-256} instructions.
@item avx10.2-512
Target supports the execution of @code{avx10.2-512} instructions.
/* Run AVX10 test only if host has ISA support. */
if (__builtin_cpu_supports ("avx10.1-256")
#ifdef AVX10_2
- && __builtin_cpu_supports ("avx10.2")
+ && __builtin_cpu_supports ("avx10.2-256")
#endif
#ifdef AVX10_2_512
&& __builtin_cpu_supports ("avx10.2-512")
/* { dg-do run } */
/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-require-effective-target avx10_2_512 } */
#ifndef AVX10_2
#define AVX10_2
/* { dg-do run } */
/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-require-effective-target avx10_2_512 } */
#ifndef AVX10_2
#define AVX10_2
/* { dg-do run } */
/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-require-effective-target avx10_2_512 } */
#ifndef AVX10_2
#define AVX10_2
/* { dg-do run } */
/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-require-effective-target avx10_2_512 } */
#ifndef AVX10_2
#define AVX10_2
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vcmpbf16" 10 } } */
typedef __bf16 v16bf __attribute__ ((__vector_size__ (32)));
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vfmadd132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vfmsub132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vfnmadd132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
/* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -Ofast" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -Ofast" } */
/* { dg-final { scan-assembler-times "vmaxbf16" 2 } } */
/* { dg-final { scan-assembler-times "vminbf16" 2 } } */
/* { dg-do compile } */
-/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2 -mno-avxvnniint8" } */
+/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2-256 -mno-avxvnniint8" } */
typedef int v8si __attribute__ ((vector_size (32)));
v8si
foo (v8si a, v8si b, v8si c)
/* { dg-do compile } */
-/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2 -mno-avxvnniint16" } */
+/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2-256 -mno-avxvnniint16" } */
typedef int v8si __attribute__ ((vector_size (32)));
v8si
foo (v8si a, v8si b, v8si c)
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -fno-trapping-math" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2 -fno-trapping-math" } */
/* { dg-final { scan-assembler-times "vcomisbf16\[ \\t\]+\[^{}\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 6 } } */
/* { dg-final { scan-assembler-times {j[a-z]+\s} 6 } } */
/* { dg-do run } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -fno-trapping-math" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2 -fno-trapping-math" } */
+/* { dg-require-effective-target avx10_2_256 } */
#include <stdlib.h>
#include <stdint.h>
int
main (void)
{
- if (!__builtin_cpu_supports ("avx10.2"))
+ if (!__builtin_cpu_supports ("avx10.2-256"))
return 0;
float test_values[] = {
/* { dg-final { scan-assembler-times "set\[aeglnb\]+" 6 } } */
#define AVX10_ATTR \
-__attribute__((noinline, __target__("avx10.2"), optimize("no-trapping-math")))
+__attribute__((noinline, __target__("avx10.2-256"), optimize("no-trapping-math")))
AVX10_ATTR
int foo1_avx10 (__bf16 a, __bf16 b, __bf16 c, __bf16 d)
-/* { dg-do run { target { avx10_2 } } } */
+/* { dg-do run { target { avx10_2_256 } } } */
/* { dg-options "-march=x86-64-v3 -O2" } */
#include "avx10_2-comibf-3.c"
int main (void)
{
- if (!__builtin_cpu_supports ("avx10.2"))
+ if (!__builtin_cpu_supports ("avx10.2-256"))
return 0;
__bf16 a = 0.5bf16, b = -0.25bf16, c = 1.75bf16, d = -0.125bf16;
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vcomxsd\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcomxss\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vucomxsd\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2 -mfpmath=sse" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256 -mfpmath=sse" } */
/* { dg-final { scan-assembler-times "comi" 6 } } */
/* { dg-final { scan-assembler-times "comx" 12 } } */
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -mmovrs -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -mmovrs -O2" } */
/* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+" 3 } } */
/* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+{%k\[1-7\]}" 2 } } */
/* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+{%k\[1-7\]}{z}" 1 } } */
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
/* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vfmadd132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vfmsub132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vfnmadd132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
/* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
/* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -Ofast" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -Ofast" } */
/* { dg-final { scan-assembler-times "vmaxbf16" 2 } } */
/* { dg-final { scan-assembler-times "vminbf16" 2 } } */
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do compile } */
-/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */
+/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler-times "vcomisbf16\[ \\t\]+\[^{}\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 6 } } */
/* { dg-final { scan-assembler-times "jp" 2 } } */
#include <immintrin.h>
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vmovd\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovss\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovd\t%xmm0, %xmm0" 3 { target ia32 } } } */
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do compile } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vmovw\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 4 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovw\t%xmm0, %xmm0" 4 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovw\t%edi, %xmm0" 1 { target { ! ia32 } } } } */
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX10_SCALAR
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
/* { dg-do run } */
-/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-require-effective-target avx10_2 } */
+/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */
+/* { dg-require-effective-target avx10_2_256 } */
#define AVX10_2
#define AVX512VL
extern void test_sha512 (void) __attribute__((__target__("sha512")));
extern void test_sm4 (void) __attribute__((__target__("sm4")));
extern void test_user_msr (void) __attribute__((__target__("usermsr")));
-extern void test_avx10_2 (void) __attribute__((__target__("avx10.2")));
+extern void test_avx10_2_256 (void) __attribute__((__target__("avx10.2-256")));
extern void test_avx10_2_512 (void) __attribute__((__target__("avx10.2-512")));
extern void test_amx_avx512 (void) __attribute__((__target__("amx-avx512")));
extern void test_amx_tf32 (void) __attribute__((__target__("amx-tf32")));
extern void test_no_sm4 (void) __attribute__((__target__("no-sm4")));
extern void test_no_user_msr (void) __attribute__((__target__("no-usermsr")));
extern void test_no_avx10_2 (void) __attribute__((__target__("no-avx10.2")));
-extern void test_no_avx10_2_512 (void) __attribute__((__target__("no-avx10.2-512")));
extern void test_no_amx_avx512 (void) __attribute__((__target__("no-amx-avx512")));
extern void test_no_amx_tf32 (void) __attribute__((__target__("no-amx-tf32")));
extern void test_no_amx_transpose (void) __attribute__((__target__("no-amx-transpose")));
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mavx10.2" } */
+/* { dg-options "-O2 -mavx10.2-256" } */
/* { dg-final { scan-assembler-times "vcmpbf16" 10 } } */
typedef __bf16 __attribute__((__vector_size__ (4))) v2bf;
/* { dg-options "-march=x86-64-v3 -fno-trapping-math" } */
/* { dg-final { scan-assembler-times "vcomisbf16" 2 } } */
-__attribute__((target("avx10.2")))
+__attribute__((target("avx10.2-256")))
int foo (int b, int x)
{
return (__bf16) b < x;
return (__bf16) b < x;
}
-__attribute__((target("avx10.2")))
+__attribute__((target("avx10.2-256")))
int foo3 (__bf16 b, __bf16 x)
{
return (__bf16) b < x;
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */
+/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-256" } */
#include <immintrin.h>
/* Check CPU support for SM4. */
if (__builtin_cpu_supports ("sm4")
#ifdef AVX10_2
- && __builtin_cpu_supports ("avx10.2")
+ && __builtin_cpu_supports ("avx10.2-256")
#endif
#ifdef AVX10_2_512
&& __builtin_cpu_supports ("avx10.2-512")
/* { dg-do compile } */
-/* { dg-options "-mavx10.2 -O2" } */
+/* { dg-options "-mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler "vpdpwusd\t" } } */
/* { dg-final { scan-assembler "vpdpwuud\t" } } */
/* { dg-do compile } */
-/* { dg-options "-mavx10.2 -O2" } */
+/* { dg-options "-mavx10.2-256 -O2" } */
/* { dg-final { scan-assembler "vpdpbssd\t" } } */
/* { dg-final { scan-assembler "vpdpbuud\t" } } */
} "-mapxf" ]
}
-# Return 1 if avx10.2 instructions can be compiled.
-proc check_effective_target_avx10_2 { } {
- return [check_no_compiler_messages avx10.2 object {
+# Return 1 if avx10.2-256 instructions can be compiled.
+proc check_effective_target_avx10_2_256 { } {
+ return [check_no_compiler_messages avx10.2-256 object {
void
foo ()
{