};
struct stmmac_dma_cfg {
+ /* pbl: programmable burst limit
+ * txpbl: transmit programmable burst limit
+ * rxpbl: receive programmable burst limit
+ * If txpbl or rxpbl are zero, the value of pbl will be substituted.
+ * Range 0 - 63.
+ */
int pbl;
int txpbl;
int rxpbl;
+ /* pblx8: multiplies pbl, txpbl, rxpbl by a factor of 8 for dwmac >=
+ * 3.50a, or a factor of 4 for previous versions.
+ */
bool pblx8;
+ /* fixed_burst:
+ * when set, AXI bursts defined by axi_blen_regval are permitted.
+ * AHB uses SINGLE, INCR4, INCR8 or INCR16 during burst transfers.
+ * when clear, AXI and AHB use SINGLE or INCR bursts.
+ */
bool fixed_burst;
+ /* mixed_burst:
+ * when set and fixed_burst is clear, AHB uses INCR for bursts > 16
+ * and SINGLE or INCRx for bursts <= 16.
+ */
bool mixed_burst;
+ /* aal: address aligned bursts for AHB and AXI master interface */
bool aal;
+ bool dche;
bool eame;
+ /* multi_msi_en: stmmac core internal */
bool multi_msi_en;
- bool dche;
+ /* atds: stmmac core internal */
bool atds;
};