re PR rtl-optimization/7792 (ICE with -march=athlon-xp -O2)

	PR opt/7912
	PR opt/7390
	* i386.c (athlon_cost): Fix the move costs.

From-SVN: r57986

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e0331a12456e4443404d28f5282ac9fc443fae10..7c5d0a4382ab237b94eee77de673a16c612dd131 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+Wed Oct  9 19:09:13 CEST 2002  Jan Hubicka  <jh@suse.cz>
+
+       PR opt/7912
+       PR opt/7390
+       * i386.c (athlon_cost): Fix the move costs.
+
 2002-10-09  Alan Modra  <amodra@bigpond.net.au>
 
        * libgcc2.c (__floatdisf): Properly cure double rounding.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ff9903c33fcb9bc4f314ec443cde7f2b3477b2ba..8c9df73c7efa4fcd7313873b122022570a94992d 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -284,25 +284,25 @@ struct processor_costs athlon_cost = {
   8,                                   /* "large" insn */
   9,                                   /* MOVE_RATIO */
   4,                                   /* cost for loading QImode using movzbl */
-  {4, 5, 4},                           /* cost of loading integer registers
+  {3, 4, 3},                           /* cost of loading integer registers
                                           in QImode, HImode and SImode.
                                           Relative to reg-reg move (2).  */
-  {2, 3, 2},                           /* cost of storing integer registers */
+  {3, 4, 3},                           /* cost of storing integer registers */
   4,                                   /* cost of reg,reg fld/fst */
-  {6, 6, 20},                          /* cost of loading fp registers
+  {4, 4, 12},                          /* cost of loading fp registers
                                           in SFmode, DFmode and XFmode */
-  {4, 4, 16},                          /* cost of loading integer registers */
+  {6, 6, 8},                           /* cost of loading integer registers */
   2,                                   /* cost of moving MMX register */
-  {2, 2},                              /* cost of loading MMX registers
+  {4, 4},                              /* cost of loading MMX registers
                                           in SImode and DImode */
-  {2, 2},                              /* cost of storing MMX registers
+  {4, 4},                              /* cost of storing MMX registers
                                           in SImode and DImode */
   2,                                   /* cost of moving SSE register */
-  {2, 2, 8},                           /* cost of loading SSE registers
+  {4, 4, 6},                           /* cost of loading SSE registers
                                           in SImode, DImode and TImode */
-  {2, 2, 8},                           /* cost of storing SSE registers
+  {4, 4, 5},                           /* cost of storing SSE registers
                                           in SImode, DImode and TImode */
-  6,                                   /* MMX or SSE register to integer */
+  5,                                   /* MMX or SSE register to integer */
   64,                                  /* size of prefetch block */
   6,                                   /* number of parallel prefetches */
 };