]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
gpio: rockchip: request GPIO mux to pinctrl when setting direction
authorQuentin Schulz <quentin.schulz@theobroma-systems.com>
Fri, 30 Sep 2022 13:20:33 +0000 (15:20 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 24 Oct 2022 07:56:51 +0000 (09:56 +0200)
commit 8ea8af6c8469156ac2042d83d73f6b74eb4b4b45 upstream.

Before the split of gpio and pinctrl sections in their own driver,
rockchip_set_mux was called in pinmux_ops.gpio_set_direction for
configuring a pin in its GPIO function.

This is essential for cases where pinctrl is "bypassed" by gpio
consumers otherwise the GPIO function is not configured for the pin and
it does not work. Such was the case for the sysfs/libgpiod userspace
GPIO handling.

Let's call pinctrl_gpio_direction_input/output when setting the
direction of a GPIO so that the pinctrl core requests from the rockchip
pinctrl driver to put the pin in its GPIO function.

Fixes: 9ce9a02039de ("pinctrl/rockchip: drop the gpio related codes")
Fixes: 936ee2675eee ("gpio/rockchip: add driver for rockchip gpio")
Cc: stable@vger.kernel.org
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20220930132033.4003377-3-foss+kernel@0leil.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpio/gpio-rockchip.c

index bb953f6478647e400324a887ef41fdd4c4a30487..fd31e36f5b9a5c6bf8f161764201869e1b1cad11 100644 (file)
@@ -19,6 +19,7 @@
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/of_irq.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/pinctrl/pinconf-generic.h>
 #include <linux/regmap.h>
 
@@ -155,6 +156,12 @@ static int rockchip_gpio_set_direction(struct gpio_chip *chip,
        unsigned long flags;
        u32 data = input ? 0 : 1;
 
+
+       if (input)
+               pinctrl_gpio_direction_input(bank->pin_base + offset);
+       else
+               pinctrl_gpio_direction_output(bank->pin_base + offset);
+
        raw_spin_lock_irqsave(&bank->slock, flags);
        rockchip_gpio_writel_bit(bank, offset, data, bank->gpio_regs->port_ddr);
        raw_spin_unlock_irqrestore(&bank->slock, flags);