#define lpfc_sli_intf_sli_family_MASK 0x0000000F
#define lpfc_sli_intf_sli_family_WORD word0
#define LPFC_SLI_INTF_FAMILY_BE2 0x0
-#define LPFC_SLI_INTF_FAMILY_BE3 0x1
+#define LPFC_SLI_INTF_ASIC_ID 0x1 /* Refer to ASIC_ID register */
+#define LPFC_SLI_INTF_FAMILY_BE3 0x3
#define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa
#define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb
#define LPFC_SLI_INTF_FAMILY_G6 0xc
#define LPFC_SLI_INTF_IF_TYPE_VIRT 1
};
+struct lpfc_asic_id {
+ u32 word0;
+#define lpfc_asic_id_gen_num_SHIFT 8
+#define lpfc_asic_id_gen_num_MASK 0x000000FF
+#define lpfc_asic_id_gen_num_WORD word0
+#define LPFC_SLI_INTF_FAMILY_G8 0x10
+#define lpfc_asic_id_rev_num_SHIFT 0
+#define lpfc_asic_id_rev_num_MASK 0x000000FF
+#define lpfc_asic_id_rev_num_WORD word0
+};
+
#define LPFC_SLI4_MBX_EMBED true
#define LPFC_SLI4_MBX_NEMBED false
#define LPFC_PORT_SEM_UE_RECOVERABLE 0xE000
#define LPFC_PORT_SEM_MASK 0xF000
+
+/* The following are config space register offsets */
+#define LPFC_ASIC_ID_OFFSET 0x0308
+
/* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */
#define LPFC_UERR_STATUS_HI 0x00A4
#define LPFC_UERR_STATUS_LO 0x00A0
/* The following BAR0 register sets are defined for if_type 0 and 2 UCNAs. */
#define LPFC_SLI_INTF 0x0058
-#define LPFC_SLI_ASIC_VER 0x009C
#define LPFC_CTL_PORT_SEM_OFFSET 0x400
#define lpfc_port_smphr_perr_SHIFT 31
#define MAGIC_NUMBER_G6 0xFEAA0003
#define MAGIC_NUMBER_G7 0xFEAA0005
#define MAGIC_NUMBER_G7P 0xFEAA0020
+#define MAGIC_NUMBER_G8 0xFEAA0070
struct lpfc_grp_hdr {
uint32_t size;
unsigned long bar0map_len, bar1map_len, bar2map_len;
int error;
uint32_t if_type;
+ u8 sli_family;
if (!pdev)
return -ENODEV;
return -ENODEV;
}
+ /* Check if ASIC_ID register should be read */
+ sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
+ if (sli_family == LPFC_SLI_INTF_ASIC_ID) {
+ if (pci_read_config_dword(pdev, LPFC_ASIC_ID_OFFSET,
+ &phba->sli4_hba.asic_id.word0))
+ return -ENODEV;
+ }
+
if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
/*
* Get the bus address of SLI4 device Bar regions and the
u8 sli_family;
sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
+
+ /* Refer to ASIC_ID register case */
+ if (sli_family == LPFC_SLI_INTF_ASIC_ID)
+ sli_family = bf_get(lpfc_asic_id_gen_num,
+ &phba->sli4_hba.asic_id);
+
/* Three cases: (1) FW was not supported on the detected adapter.
* (2) FW update has been locked out administratively.
* (3) Some other error during FW update.
(sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
magic_number != MAGIC_NUMBER_G7) ||
(sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
- magic_number != MAGIC_NUMBER_G7P)) {
+ magic_number != MAGIC_NUMBER_G7P) ||
+ (sli_family == LPFC_SLI_INTF_FAMILY_G8 &&
+ magic_number != MAGIC_NUMBER_G8)) {
lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
"3030 This firmware version is not supported on"
" this HBA model. Device:%x Magic:%x Type:%x "
uint32_t ue_to_sr;
uint32_t ue_to_rp;
struct lpfc_register sli_intf;
+ struct lpfc_register asic_id;
struct lpfc_pc_sli4_params pc_sli4_params;
struct lpfc_bbscn_params bbscn_params;
struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */