amdgcn: Add vector integer negate insn

Another example of the vectorizer needing explicit insns where the scalar
expander just works.

gcc/ChangeLog:

	* config/gcn/gcn-valu.md (neg<mode>2): New define_expand.

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index c388c4833f5521cd713e034ebd0bb58548bb0232..7dcc22020724f8fdfb4fb94a2739e56d6a4c1ef1 100644 (file)
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,10 @@
+2022-10-12  Andrew Stubbs  <ams@codesourcery.com>
+
+       Backport from mainline:
+       2022-10-11  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn-valu.md (neg<mode>2): New define_expand.
+
 2022-10-12  Andrew Stubbs  <ams@codesourcery.com>
 
        Backport from mainline:

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 3e7434a02a827ffe463f98c6be09ed4821b659a7..9691ff480cecaf09b22749666277c303d0376715 100644 (file)
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2393,6 +2393,19 @@
   [(set_attr "type" "vop2,ds")
    (set_attr "length" "8,8")])
 
+;; }}}
+;; {{{ Int unops
+
+(define_expand "neg<mode>2"
+  [(match_operand:V_INT 0 "register_operand")
+   (match_operand:V_INT 1 "register_operand")]
+  ""
+  {
+    emit_insn (gen_sub<mode>3 (operands[0], gcn_vec_constant (<MODE>mode, 0),
+                              operands[1]));
+    DONE;
+  })
+
 ;; }}}
 ;; {{{ FP binops - special cases