backport: aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.

2015-05-12  Yvan Roux  <yvan.roux@linaro.org>

	Backport from mainline.
	2015-05-05  Yvan Roux  <yvan.roux@linaro.org>

	* config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
	(LINK_SPEC): Include CA53_ERR_843419_SPEC.
	* config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
	(LINK_SPEC): Include CA53_ERR_843419_SPEC.
	* config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option.
	* configure: Regenerate.
	* configure.ac: Add --enable-fix-cortex-a53-843419 option.
	* doc/install.texi (aarch64*-*-*): Document new
	--enable-fix-cortex-a53-843419 option.
	* doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419
	and -mno-fix-cortex-a53-843419 options.

From-SVN: r223046

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 54d637bf63d1c35a6087da345ca1679b1c3719fc..f4e36cb31ad384b416ca8536fc51120523a7c0db 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2015-05-12  Yvan Roux  <yvan.roux@linaro.org>
+
+       Backport from mainline.
+       2015-05-05  Yvan Roux  <yvan.roux@linaro.org>
+
+       * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
+       (LINK_SPEC): Include CA53_ERR_843419_SPEC.
+       * config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
+       (LINK_SPEC): Include CA53_ERR_843419_SPEC.
+       * config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option.
+       * configure: Regenerate.
+       * configure.ac: Add --enable-fix-cortex-a53-843419 option.
+       * doc/install.texi (aarch64*-*-*): Document new
+       --enable-fix-cortex-a53-843419 option.
+       * doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419
+       and -mno-fix-cortex-a53-843419 options.
+
 2015-05-06  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/65990

diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h
index eafdd551d3e37943b4612c6cf258c938bf052de5..48e3dfb3fd028a5f040caedd6732cedccea9d40a 100644 (file)
--- a/gcc/config/aarch64/aarch64-elf-raw.h
+++ b/gcc/config/aarch64/aarch64-elf-raw.h
@@ -33,10 +33,19 @@
   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
 #endif
 
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+  " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+  " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
 #ifndef LINK_SPEC
 #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \
   -maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
-  CA53_ERR_835769_SPEC
+  CA53_ERR_835769_SPEC \
+  CA53_ERR_843419_SPEC
 #endif
 
 #endif /* GCC_AARCH64_ELF_RAW_H */

diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
index c47fbae218d67eafd5ded8bfbf8e551cbc19eb70..b7d2d60f389d2d397303b39ca7c40965b939e353 100644 (file)
--- a/gcc/config/aarch64/aarch64-linux.h
+++ b/gcc/config/aarch64/aarch64-linux.h
@@ -43,8 +43,17 @@
   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
 #endif
 
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+  " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+  " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
 #define LINK_SPEC LINUX_TARGET_LINK_SPEC \
-                  CA53_ERR_835769_SPEC
+                  CA53_ERR_835769_SPEC \
+                  CA53_ERR_843419_SPEC
 
 #define TARGET_OS_CPP_BUILTINS()               \
   do                                           \

diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
index fc0307e28690aff934a13889cc3309f77d1469a5..266d873c6ddd7a3f08e48e2290571a82c6b600ed 100644 (file)
--- a/gcc/config/aarch64/aarch64.opt
+++ b/gcc/config/aarch64/aarch64.opt
@@ -71,6 +71,10 @@ mfix-cortex-a53-835769
 Target Report Var(aarch64_fix_a53_err835769) Init(2)
 Workaround for ARM Cortex-A53 Erratum number 835769
 
+mfix-cortex-a53-843419
+Target Report
+Workaround for ARM Cortex-A53 Erratum number 843419
+
 mlittle-endian
 Target Report RejectNegative InverseMask(BIG_END)
 Assume target CPU is configured as little endian

diff --git a/gcc/configure b/gcc/configure
index 64d0c50c5cec16b31cad8a003aa9bb8c03a00121..ab5b2ec3b08f7ee1d97fa0369e263bfe8e0f0ef0 100755 (executable)
--- a/gcc/configure
+++ b/gcc/configure
@@ -920,6 +920,7 @@ enable_gnu_indirect_function
 enable_initfini_array
 enable_comdat
 enable_fix_cortex_a53_835769
+enable_fix_cortex_a53_843419
 with_glibc_version
 enable_gnu_unique_object
 enable_linker_build_id
@@ -1644,6 +1645,14 @@ Optional Features:
                           disable workaround for AArch64 Cortex-A53 erratum
                           835769 by default
 
+
+  --enable-fix-cortex-a53-843419
+                          enable workaround for AArch64 Cortex-A53 erratum
+                          843419 by default
+  --disable-fix-cortex-a53-843419
+                          disable workaround for AArch64 Cortex-A53 erratum
+                          843419 by default
+
   --enable-gnu-unique-object
                           enable the use of the @gnu_unique_object ELF
                           extension on glibc systems
@@ -17936,7 +17945,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 17939 "configure"
+#line 17948 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -18042,7 +18051,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 18045 "configure"
+#line 18054 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -24030,6 +24039,25 @@ if test "${enable_fix_cortex_a53_835769+set}" = set; then :
 
         esac
 
+fi
+
+    # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+    # Check whether --enable-fix-cortex-a53-843419 was given.
+if test "${enable_fix_cortex_a53_843419+set}" = set; then :
+  enableval=$enable_fix_cortex_a53_843419;
+        case $enableval in
+          yes)
+            tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+            ;;
+          no)
+            ;;
+          *)
+            as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+  Valid choices are 'yes' and 'no'." "$LINENO" 5
+            ;;
+
+        esac
+
 fi
 
     ;;

diff --git a/gcc/configure.ac b/gcc/configure.ac
index 8fec18253028aa9c141ee5207a3d3d276f5e90fe..7bf1250a6c16525f75436f8faf2732aab8b784e9 100644 (file)
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3564,6 +3564,29 @@ AS_HELP_STRING([--disable-fix-cortex-a53-835769],
         esac
       ],
     [])
+    # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+    AC_ARG_ENABLE(fix-cortex-a53-843419,
+    [
+AS_HELP_STRING([--enable-fix-cortex-a53-843419],
+        [enable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+AS_HELP_STRING([--disable-fix-cortex-a53-843419],
+        [disable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+    ],
+      [
+        case $enableval in
+          yes)
+            tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+            ;;
+          no)
+            ;;
+          *)
+            AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+  Valid choices are 'yes' and 'no'.])
+            ;;
+
+        esac
+      ],
+    [])
     ;;
 
   # All TARGET_ABI_OSF targets.

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 1daedff69bffff15ce0ffde9017d9e6329b113d9..ff78c382be822b2d0538627c51aff7ea1de48d6e 100644 (file)
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -3769,13 +3769,24 @@ not support option @option{-mabi=ilp32}.
 To enable a workaround for the Cortex-A53 erratum number 835769 by default
 (for all CPUs regardless of -mcpu option given) at configure time use the
 @option{--enable-fix-cortex-a53-835769} option.  This will enable the fix by
-default and can be explicitly disabled during during compilation by passing the
+default and can be explicitly disabled during compilation by passing the
 @option{-mno-fix-cortex-a53-835769} option.  Conversely,
 @option{--disable-fix-cortex-a53-835769} will disable the workaround by
 default.  The workaround is disabled by default if neither of
 @option{--enable-fix-cortex-a53-835769} or
 @option{--disable-fix-cortex-a53-835769} is given at configure time.
 
+To enable a workaround for the Cortex-A53 erratum number 843419 by default
+(for all CPUs regardless of -mcpu option given) at configure time use the
+@option{--enable-fix-cortex-a53-843419} option.  This workaround is applied at
+link time.  Enabling the workaround will cause GCC to pass the relevant option
+to the linker.  It can be explicitly disabled during compilation by passing the
+@option{-mno-fix-cortex-a53-843419} option.  Conversely,
+@option{--disable-fix-cortex-a53-843419} will disable the workaround by default.
+The workaround is disabled by default if neither of
+@option{--enable-fix-cortex-a53-843419} or
+@option{--disable-fix-cortex-a53-843419} is given at configure time.
+
 @html
 <hr />
 <!-- rs6000-ibm-aix*, powerpc-ibm-aix* -->

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4cd27cd010cb12aa9fa66abcf79661fcf83ef738..865817eed5b2705a6919f7705e2cec9613bc4e74 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -480,6 +480,7 @@ Objective-C and Objective-C++ Dialects}.
 -momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer @gol
 -mtls-dialect=desc  -mtls-dialect=traditional @gol
 -mfix-cortex-a53-835769  -mno-fix-cortex-a53-835769 @gol
+-mfix-cortex-a53-843419  -mno-fix-cortex-a53-843419 @gol
 -march=@var{name}  -mcpu=@var{name}  -mtune=@var{name}}
 
 @emph{Adapteva Epiphany Options}
@@ -11437,6 +11438,14 @@ Enable or disable the workaround for the ARM Cortex-A53 erratum number 835769.
 This will involve inserting a NOP instruction between memory instructions and
 64-bit integer multiply-accumulate instructions.
 
+@item -mfix-cortex-a53-843419
+@itemx -mno-fix-cortex-a53-843419
+@opindex mfix-cortex-a53-843419
+@opindex mno-fix-cortex-a53-843419
+Enable or disable the workaround for the ARM Cortex-A53 erratum number 843419.
+This erratum workaround is made at link time and this will only pass the
+corresponding flag to the linker.
+
 @item -march=@var{name}
 @opindex march
 Specify the name of the target architecture, optionally suffixed by one or