scsi: arm64: dts: mediatek: mt8195: Add UFSHCI node

Add a UFS host controller interface (UFSHCI) node to mt8195.dtsi.
Introduce the 'mediatek,ufs-disable-mcq' property to allow disabling
Multiple Circular Queue (MCQ) support.

Signed-off-by: Rice Lee <ot_riceyj.lee@mediatek.com>
Signed-off-by: Eric Lin <ht.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://lore.kernel.org/r/20250722085721.2062657-4-macpaul.lin@mediatek.com
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index dd065b1bf94a3d6893a82d4d998c138bf6b76526..8877953ce292b686eca3f7c030cd48bcc87a6917 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1430,6 +1430,31 @@
                        status = "disabled";
                };
 
+               ufshci: ufshci@11270000 {
+                       compatible = "mediatek,mt8195-ufshci";
+                       reg = <0 0x11270000 0 0x2300>;
+                       interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0>;
+                       phys = <&ufsphy>;
+                       clocks = <&infracfg_ao CLK_INFRA_AO_AES_UFSFDE>,
+                                <&infracfg_ao CLK_INFRA_AO_AES>,
+                                <&infracfg_ao CLK_INFRA_AO_UFS_TICK>,
+                                <&infracfg_ao CLK_INFRA_AO_UNIPRO_SYS>,
+                                <&infracfg_ao CLK_INFRA_AO_UNIPRO_TICK>,
+                                <&infracfg_ao CLK_INFRA_AO_UFS_MP_SAP_B>,
+                                <&infracfg_ao CLK_INFRA_AO_UFS_TX_SYMBOL>,
+                                <&infracfg_ao CLK_INFRA_AO_PERI_UFS_MEM_SUB>;
+                       clock-names = "ufs", "ufs_aes", "ufs_tick",
+                                       "unipro_sysclk", "unipro_tick",
+                                       "unipro_mp_bclk", "ufs_tx_symbol",
+                                       "ufs_mem_sub";
+                       freq-table-hz = <0 0>, <0 0>, <0 0>,
+                                       <0 0>, <0 0>, <0 0>,
+                                       <0 0>, <0 0>;
+
+                       mediatek,ufs-disable-mcq;
+                       status = "disabled";
+               };
+
                lvts_mcu: thermal-sensor@11278000 {
                        compatible = "mediatek,mt8195-lvts-mcu";
                        reg = <0 0x11278000 0 0x1000>;