x86: Use AVX2 memcpy/memset on Skylake server [BZ #21396]

On Skylake server, AVX512 load/store instructions in memcpy/memset may
lead to lower CPU turbo frequency in certain situations.  Use of AVX2
in memcpy/memset has been observed to have improved overall performance
in many workloads due to the higher frequency.

Since AVX512ER is unique to Xeon Phi, this patch sets Prefer_No_AVX512
if AVX512ER isn't available so that AVX2 versions of memcpy/memset are
used on Skylake server.

	[BZ #21396]
	* sysdeps/x86/cpu-features.c (init_cpu_features): Set
	Prefer_No_AVX512 if AVX512ER isn't available.
	* sysdeps/x86/cpu-features.h (bit_arch_Prefer_No_AVX512): New.
	(index_arch_Prefer_No_AVX512): Likewise.
	* sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Don't use
	AVX512 version if Prefer_No_AVX512 is set.
	* sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk):
	Likewise.
	* sysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Likewise.
	* sysdeps/x86_64/multiarch/memmove_chk.S (__memmove_chk):
	Likewise.
	* sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise.
	* sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk):
	Likewise.
	* sysdeps/x86_64/multiarch/memset.S (memset): Likewise.
	* sysdeps/x86_64/multiarch/memset_chk.S (__memset_chk):
	Likewise.

(cherry picked from commit 4cb334c4d6249686653137ec273d081371b3672d)

diff --git a/ChangeLog b/ChangeLog
index eecd2133c7524e939b9f89586148da4423e9935c..8734292665cf897609680ad2fce86a47b264e865 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,24 @@
+2017-04-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       [BZ #21396]
+       * sysdeps/x86/cpu-features.c (init_cpu_features): Set
+       Prefer_No_AVX512 if AVX512ER isn't available.
+       * sysdeps/x86/cpu-features.h (bit_arch_Prefer_No_AVX512): New.
+       (index_arch_Prefer_No_AVX512): Likewise.
+       * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Don't use
+       AVX512 version if Prefer_No_AVX512 is set.
+       * sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk):
+       Likewise.
+       * sysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Likewise.
+       * sysdeps/x86_64/multiarch/memmove_chk.S (__memmove_chk):
+       Likewise.
+       * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise.
+       * sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk):
+       Likewise.
+       * sysdeps/x86_64/multiarch/memset.S (memset): Likewise.
+       * sysdeps/x86_64/multiarch/memset_chk.S (__memset_chk):
+       Likewise.
+
 2017-04-28  H.J. Lu  <hongjiu.lu@intel.com>
 
        * sysdeps/x86/cpu-features.c (init_cpu_features): Set

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 8f8cfce5b68ba7c4f2871ab50e13b15f21c00854..d1ee9222902f81aa5d1cf98d127086ece513009e 100644 (file)
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -205,10 +205,14 @@ init_cpu_features (struct cpu_features *cpu_features)
          |= bit_arch_AVX_Fast_Unaligned_Load;
 
       /* Since AVX512ER is unique to Xeon Phi, set Prefer_No_VZEROUPPER
-         if AVX512ER is available.  */
+         if AVX512ER is available.  Don't use AVX512 to avoid lower CPU
+        frequency if AVX512ER isn't available.  */
       if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER))
        cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
          |= bit_arch_Prefer_No_VZEROUPPER;
+      else
+       cpu_features->feature[index_arch_Prefer_No_AVX512]
+         |= bit_arch_Prefer_No_AVX512;
 
       /* To avoid SSE transition penalty, use _dl_runtime_resolve_slow.
          If XGETBV suports ECX == 1, use _dl_runtime_resolve_opt.  */

diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index 265bc6c14d04af38850f7a4ade24af86a2785118..2609ac09996f987f8f83825371dd0b6197413660 100644 (file)
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -39,6 +39,7 @@
 #define bit_arch_Prefer_ERMS                   (1 << 19)
 #define bit_arch_Use_dl_runtime_resolve_opt    (1 << 20)
 #define bit_arch_Use_dl_runtime_resolve_slow   (1 << 21)
+#define bit_arch_Prefer_No_AVX512              (1 << 22)
 
 /* CPUID Feature flags.  */
 
@@ -116,6 +117,7 @@
 # define index_arch_Prefer_ERMS                FEATURE_INDEX_1*FEATURE_SIZE
 # define index_arch_Use_dl_runtime_resolve_opt FEATURE_INDEX_1*FEATURE_SIZE
 # define index_arch_Use_dl_runtime_resolve_slow FEATURE_INDEX_1*FEATURE_SIZE
+# define index_arch_Prefer_No_AVX512   FEATURE_INDEX_1*FEATURE_SIZE
 
 
 # if defined (_LIBC) && !IS_IN (nonlib)
@@ -298,6 +300,7 @@ extern const struct cpu_features *__get_cpu_features (void)
 # define index_arch_Prefer_ERMS                FEATURE_INDEX_1
 # define index_arch_Use_dl_runtime_resolve_opt FEATURE_INDEX_1
 # define index_arch_Use_dl_runtime_resolve_slow FEATURE_INDEX_1
+# define index_arch_Prefer_No_AVX512   FEATURE_INDEX_1
 
 #endif /* !__ASSEMBLER__ */
 

diff --git a/sysdeps/x86_64/multiarch/memcpy.S b/sysdeps/x86_64/multiarch/memcpy.S
index b8677596f903b0b3f850152e96f02de45cd33684..ea4ec70d1acf6073b153c5164f345ba3c38fd9d4 100644 (file)
--- a/sysdeps/x86_64/multiarch/memcpy.S
+++ b/sysdeps/x86_64/multiarch/memcpy.S
@@ -32,6 +32,8 @@ ENTRY(__new_memcpy)
        lea     __memcpy_erms(%rip), %RAX_LP
        HAS_ARCH_FEATURE (Prefer_ERMS)
        jnz     2f
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memcpy_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memcpy_chk.S b/sysdeps/x86_64/multiarch/memcpy_chk.S
index 9d92c8a7e30a6f94d558ffcce536d794c8e3cc4a..26b49de6f688beaa72a89886b3abf162aba8ec60 100644 (file)
--- a/sysdeps/x86_64/multiarch/memcpy_chk.S
+++ b/sysdeps/x86_64/multiarch/memcpy_chk.S
@@ -30,6 +30,8 @@
 ENTRY(__memcpy_chk)
        .type   __memcpy_chk, @gnu_indirect_function
        LOAD_RTLD_GLOBAL_RO_RDX
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memcpy_chk_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memmove.S b/sysdeps/x86_64/multiarch/memmove.S
index ff5e041420c1716996a7bce34d903f0416931af6..ef92afde5a3a7bc41b3a34ec48309e9cc9b24fcb 100644 (file)
--- a/sysdeps/x86_64/multiarch/memmove.S
+++ b/sysdeps/x86_64/multiarch/memmove.S
@@ -30,6 +30,8 @@ ENTRY(__libc_memmove)
        lea     __memmove_erms(%rip), %RAX_LP
        HAS_ARCH_FEATURE (Prefer_ERMS)
        jnz     2f
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memmove_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memmove_chk.S b/sysdeps/x86_64/multiarch/memmove_chk.S
index 7f861206df1d2710377d901f556a53868bd303fc..a9129c460acf4f9800a48d5934a40355432b5ede 100644 (file)
--- a/sysdeps/x86_64/multiarch/memmove_chk.S
+++ b/sysdeps/x86_64/multiarch/memmove_chk.S
@@ -29,6 +29,8 @@
 ENTRY(__memmove_chk)
        .type   __memmove_chk, @gnu_indirect_function
        LOAD_RTLD_GLOBAL_RO_RDX
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memmove_chk_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/mempcpy.S b/sysdeps/x86_64/multiarch/mempcpy.S
index 51970687cfb20f11cf9b541e0b3df2819117e68b..87c8299fea08708aaa2078c057b0d288f581078d 100644 (file)
--- a/sysdeps/x86_64/multiarch/mempcpy.S
+++ b/sysdeps/x86_64/multiarch/mempcpy.S
@@ -32,6 +32,8 @@ ENTRY(__mempcpy)
        lea     __mempcpy_erms(%rip), %RAX_LP
        HAS_ARCH_FEATURE (Prefer_ERMS)
        jnz     2f
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __mempcpy_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/mempcpy_chk.S b/sysdeps/x86_64/multiarch/mempcpy_chk.S
index 9e49f6f26e19c8f0238503b22564c5a8049218cc..642c67973ba9e1602470d1ad7fcaefabba6182e1 100644 (file)
--- a/sysdeps/x86_64/multiarch/mempcpy_chk.S
+++ b/sysdeps/x86_64/multiarch/mempcpy_chk.S
@@ -30,6 +30,8 @@
 ENTRY(__mempcpy_chk)
        .type   __mempcpy_chk, @gnu_indirect_function
        LOAD_RTLD_GLOBAL_RO_RDX
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __mempcpy_chk_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memset.S b/sysdeps/x86_64/multiarch/memset.S
index 96e99341aaaa9136a69e423f89b09e8520d293b1..eae39e2ecd569259fcda39720358f38fef86f9a9 100644 (file)
--- a/sysdeps/x86_64/multiarch/memset.S
+++ b/sysdeps/x86_64/multiarch/memset.S
@@ -41,6 +41,8 @@ ENTRY(memset)
        jnz     L(AVX512F)
        lea     __memset_avx2_unaligned(%rip), %RAX_LP
 L(AVX512F):
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     2f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      2f
        lea     __memset_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memset_chk.S b/sysdeps/x86_64/multiarch/memset_chk.S
index 2efe6ed909c46c95df9082c4c55490b1350487a9..38d7bef6df0768f033bcc0c08942f52d611a82c5 100644 (file)
--- a/sysdeps/x86_64/multiarch/memset_chk.S
+++ b/sysdeps/x86_64/multiarch/memset_chk.S
@@ -38,6 +38,8 @@ ENTRY(__memset_chk)
        jnz     L(AVX512F)
        lea     __memset_chk_avx2_unaligned(%rip), %RAX_LP
 L(AVX512F):
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     2f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      2f
        lea     __memset_chk_avx512_no_vzeroupper(%rip), %RAX_LP