cache-size = <0x80000>;
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
-@@ -30,47 +30,47 @@
+@@ -31,47 +31,47 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "cache";
cache-level = <2>;
cache-unified;
-@@ -993,10 +993,10 @@
+@@ -1015,10 +1015,10 @@
cooling-maps {
map0 {
trip = <&cpu_alert>;
cache-unified;
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-@@ -33,12 +33,12 @@
+@@ -34,12 +34,12 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
-@@ -46,12 +46,12 @@
+@@ -47,12 +47,12 @@
#cooling-cells = <2>;
};
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
-@@ -59,12 +59,12 @@
+@@ -60,12 +60,12 @@
#cooling-cells = <2>;
};
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
-@@ -72,12 +72,12 @@
+@@ -73,12 +73,12 @@
#cooling-cells = <2>;
};
clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
-@@ -85,7 +85,7 @@
+@@ -86,7 +86,7 @@
#cooling-cells = <2>;
};
compatible = "cache";
cache-level = <2>;
cache-unified;
-@@ -845,10 +845,10 @@
+@@ -863,10 +863,10 @@
cooling-maps {
map0 {
trip = <&cpu0_alert>;
};
};
};
-@@ -875,10 +875,10 @@
+@@ -891,10 +891,10 @@
cooling-maps {
map0 {
trip = <&cpu1_alert>;
};
};
};
-@@ -905,10 +905,10 @@
+@@ -919,10 +919,10 @@
cooling-maps {
map0 {
trip = <&cpu2_alert>;
};
};
};
-@@ -935,10 +935,10 @@
+@@ -947,10 +947,10 @@
cooling-maps {
map0 {
trip = <&cpu3_alert>;
@@ -184,16 +180,6 @@
rpm_requests: rpm-requests {
- compatible = "qcom,rpm-ipq6018";
+ compatible = "qcom,rpm-ipq6018", "qcom,glink-smd-rpm";
qcom,glink-channels = "rpm_requests";
-
- regulators {
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -1580,6 +1580,7 @@ static const struct of_device_id qcom_pc
+@@ -1827,6 +1827,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 },
{ .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 },
{ .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 },
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -752,7 +752,7 @@
+@@ -759,7 +759,7 @@
reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
ranges = <0 0xb00a000 0xffd>;
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0xffd>;
-@@ -865,8 +865,7 @@
+@@ -872,8 +872,7 @@
ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 142
-@@ -937,8 +936,7 @@
+@@ -944,8 +943,7 @@
ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
struct regulator *cx_supply;
struct qcom_sysmon *sysmon;
-@@ -151,6 +139,21 @@ struct q6v5_wcss {
+@@ -152,6 +140,21 @@ struct q6v5_wcss {
struct qcom_rproc_ssr ssr_subdev;
};
static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
{
int ret;
-@@ -240,6 +243,12 @@ static int q6v5_wcss_start(struct rproc
+@@ -241,6 +244,12 @@ static int q6v5_wcss_start(struct rproc
struct q6v5_wcss *wcss = rproc->priv;
int ret;
qcom_q6v5_prepare(&wcss->q6v5);
/* Release Q6 and WCSS reset */
-@@ -733,6 +742,7 @@ static int q6v5_wcss_stop(struct rproc *
+@@ -734,6 +743,7 @@ static int q6v5_wcss_stop(struct rproc *
return ret;
}
qcom_q6v5_unprepare(&wcss->q6v5);
return 0;
-@@ -899,7 +909,21 @@ static int q6v5_alloc_memory_region(stru
+@@ -900,7 +910,21 @@ static int q6v5_alloc_memory_region(stru
return 0;
}
{
int ret;
-@@ -989,7 +1013,7 @@ static int q6v5_wcss_init_clock(struct q
+@@ -990,7 +1014,7 @@ static int q6v5_wcss_init_clock(struct q
return 0;
}
{
wcss->cx_supply = devm_regulator_get(wcss->dev, "cx");
if (IS_ERR(wcss->cx_supply))
-@@ -1033,12 +1057,14 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1034,12 +1058,14 @@ static int q6v5_wcss_probe(struct platfo
if (ret)
- goto free_rproc;
+ return ret;
- if (wcss->version == WCSS_QCS404) {
- ret = q6v5_wcss_init_clock(wcss);
+ if (desc->init_clock) {
+ ret = desc->init_clock(wcss);
if (ret)
- goto free_rproc;
+ return ret;
+ }
- ret = q6v5_wcss_init_regulator(wcss);
+ if (desc->init_regulator) {
+ ret = desc->init_regulator(wcss);
if (ret)
- goto free_rproc;
+ return ret;
}
-@@ -1084,6 +1110,7 @@ static void q6v5_wcss_remove(struct plat
+@@ -1081,6 +1107,7 @@ static void q6v5_wcss_remove(struct plat
}
static const struct wcss_data wcss_ipq8074_res_init = {
.firmware_name = "IPQ8074/q6_fw.mdt",
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
-@@ -1093,6 +1120,8 @@ static const struct wcss_data wcss_ipq80
+@@ -1090,6 +1117,8 @@ static const struct wcss_data wcss_ipq80
};
static const struct wcss_data wcss_qcs404_res_init = {
+ bool need_mem_protection;
struct qcom_rproc_glink glink_subdev;
- struct qcom_rproc_ssr ssr_subdev;
-@@ -152,6 +157,7 @@ struct wcss_data {
+ struct qcom_rproc_pdm pdm_subdev;
+@@ -153,6 +158,7 @@ struct wcss_data {
int ssctl_id;
const struct rproc_ops *ops;
bool requires_force_stop;
};
static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
-@@ -251,6 +257,15 @@ static int q6v5_wcss_start(struct rproc
+@@ -252,6 +258,15 @@ static int q6v5_wcss_start(struct rproc
qcom_q6v5_prepare(&wcss->q6v5);
/* Release Q6 and WCSS reset */
ret = reset_control_deassert(wcss->wcss_reset);
if (ret) {
-@@ -285,6 +300,7 @@ static int q6v5_wcss_start(struct rproc
+@@ -286,6 +301,7 @@ static int q6v5_wcss_start(struct rproc
if (ret)
goto wcss_q6_reset;
ret = qcom_q6v5_wait_for_start(&wcss->q6v5, 5 * HZ);
if (ret == -ETIMEDOUT)
dev_err(wcss->dev, "start timed out\n");
-@@ -718,6 +734,15 @@ static int q6v5_wcss_stop(struct rproc *
+@@ -719,6 +735,15 @@ static int q6v5_wcss_stop(struct rproc *
struct q6v5_wcss *wcss = rproc->priv;
int ret;
/* WCSS powerdown */
if (wcss->requires_force_stop) {
ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
-@@ -742,6 +767,7 @@ static int q6v5_wcss_stop(struct rproc *
+@@ -743,6 +768,7 @@ static int q6v5_wcss_stop(struct rproc *
return ret;
}
clk_disable_unprepare(wcss->prng_clk);
qcom_q6v5_unprepare(&wcss->q6v5);
-@@ -765,9 +791,15 @@ static int q6v5_wcss_load(struct rproc *
+@@ -766,9 +792,15 @@ static int q6v5_wcss_load(struct rproc *
struct q6v5_wcss *wcss = rproc->priv;
int ret;
if (ret)
return ret;
-@@ -1035,6 +1067,9 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1036,6 +1068,9 @@ static int q6v5_wcss_probe(struct platfo
if (!desc)
return -EINVAL;
+ if (desc->need_mem_protection && !qcom_scm_is_available())
+ return -EPROBE_DEFER;
+
- rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
- desc->firmware_name, sizeof(*wcss));
+ rproc = devm_rproc_alloc(&pdev->dev, pdev->name, desc->ops,
+ desc->firmware_name, sizeof(*wcss));
if (!rproc) {
-@@ -1048,6 +1083,7 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1049,6 +1084,7 @@ static int q6v5_wcss_probe(struct platfo
wcss->version = desc->version;
wcss->requires_force_stop = desc->requires_force_stop;
ret = q6v5_wcss_init_mmio(wcss, pdev);
if (ret)
-@@ -1117,6 +1153,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1114,6 +1150,7 @@ static const struct wcss_data wcss_ipq80
.wcss_q6_reset_required = true,
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
+ const char *m3_firmware_name;
struct qcom_rproc_glink glink_subdev;
- struct qcom_rproc_ssr ssr_subdev;
-@@ -147,7 +148,8 @@ struct q6v5_wcss {
+ struct qcom_rproc_pdm pdm_subdev;
+@@ -148,7 +149,8 @@ struct q6v5_wcss {
struct wcss_data {
int (*init_clock)(struct q6v5_wcss *wcss);
int (*init_regulator)(struct q6v5_wcss *wcss);
unsigned int crash_reason_smem;
u32 version;
bool aon_reset_required;
-@@ -789,8 +791,29 @@ static void *q6v5_wcss_da_to_va(struct r
+@@ -790,8 +792,29 @@ static void *q6v5_wcss_da_to_va(struct r
static int q6v5_wcss_load(struct rproc *rproc, const struct firmware *fw)
{
struct q6v5_wcss *wcss = rproc->priv;
if (wcss->need_mem_protection)
ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
WCNSS_PAS_ID, wcss->mem_region,
-@@ -1071,7 +1094,7 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1072,7 +1095,7 @@ static int q6v5_wcss_probe(struct platfo
return -EPROBE_DEFER;
- rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
-- desc->firmware_name, sizeof(*wcss));
-+ desc->q6_firmware_name, sizeof(*wcss));
+ rproc = devm_rproc_alloc(&pdev->dev, pdev->name, desc->ops,
+- desc->firmware_name, sizeof(*wcss));
++ desc->q6_firmware_name, sizeof(*wcss));
if (!rproc) {
dev_err(&pdev->dev, "failed to allocate rproc\n");
return -ENOMEM;
-@@ -1084,6 +1107,7 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1085,6 +1108,7 @@ static int q6v5_wcss_probe(struct platfo
wcss->version = desc->version;
wcss->requires_force_stop = desc->requires_force_stop;
wcss->need_mem_protection = desc->need_mem_protection;
ret = q6v5_wcss_init_mmio(wcss, pdev);
if (ret)
-@@ -1147,7 +1171,8 @@ static void q6v5_wcss_remove(struct plat
+@@ -1144,7 +1168,8 @@ static void q6v5_wcss_remove(struct plat
static const struct wcss_data wcss_ipq8074_res_init = {
.init_clock = ipq8074_init_clock,
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
-@@ -1160,7 +1185,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1157,7 +1182,7 @@ static const struct wcss_data wcss_qcs40
.init_clock = qcs404_init_clock,
.init_regulator = qcs404_init_regulator,
.crash_reason_smem = WCSS_CRASH_REASON,
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
-@@ -1176,6 +1176,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1173,6 +1173,7 @@ static const struct wcss_data wcss_ipq80
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
#define WCNSS_PAS_ID 6
-@@ -154,6 +154,7 @@ struct wcss_data {
+@@ -155,6 +155,7 @@ struct wcss_data {
u32 version;
bool aon_reset_required;
bool wcss_q6_reset_required;
const char *ssr_name;
const char *sysmon_name;
int ssctl_id;
-@@ -875,10 +876,13 @@ static int q6v5_wcss_init_reset(struct q
+@@ -876,10 +877,13 @@ static int q6v5_wcss_init_reset(struct q
}
}
}
return 0;
-@@ -928,9 +932,9 @@ static int q6v5_wcss_init_mmio(struct q6
+@@ -929,9 +933,9 @@ static int q6v5_wcss_init_mmio(struct q6
return -EINVAL;
}
return 0;
}
-@@ -1176,6 +1180,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1173,6 +1177,7 @@ static const struct wcss_data wcss_ipq80
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
.ssr_name = "q6wcss",
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
-@@ -1190,6 +1195,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1187,6 +1192,7 @@ static const struct wcss_data wcss_qcs40
.version = WCSS_QCS404,
.aon_reset_required = false,
.wcss_q6_reset_required = false,
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
-@@ -161,6 +161,7 @@ struct wcss_data {
+@@ -162,6 +162,7 @@ struct wcss_data {
const struct rproc_ops *ops;
bool requires_force_stop;
bool need_mem_protection;
};
static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
-@@ -1149,6 +1150,7 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1151,6 +1152,7 @@ static int q6v5_wcss_probe(struct platfo
desc->sysmon_name,
desc->ssctl_id);
+ rproc->auto_boot = desc->need_auto_boot;
ret = rproc_add(rproc);
if (ret)
- goto free_rproc;
-@@ -1185,6 +1187,7 @@ static const struct wcss_data wcss_ipq80
+ return ret;
+@@ -1182,6 +1184,7 @@ static const struct wcss_data wcss_ipq80
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
.need_mem_protection = true,
};
static const struct wcss_data wcss_qcs404_res_init = {
-@@ -1201,6 +1204,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1198,6 +1201,7 @@ static const struct wcss_data wcss_qcs40
.ssctl_id = 0x12,
.ops = &q6v5_wcss_qcs404_ops,
.requires_force_stop = false,
soc: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
-@@ -420,6 +446,11 @@
+@@ -415,6 +441,11 @@
reg = <0x01937000 0x21000>;
};
spmi_bus: spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0200f000 0x001000>,
-@@ -987,6 +1018,56 @@
+@@ -994,6 +1025,56 @@
ranges;
};
};
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -1068,6 +1068,117 @@
+@@ -1075,6 +1075,117 @@
};
};
};
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
-@@ -338,6 +338,106 @@
+@@ -326,6 +326,106 @@
reg = <0x000a4000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
-@@ -969,7 +969,7 @@ static int q6v5_alloc_memory_region(stru
+@@ -970,7 +970,7 @@ static int q6v5_alloc_memory_region(stru
return 0;
}
{
int ret;
-@@ -1176,7 +1176,7 @@ static void q6v5_wcss_remove(struct plat
+@@ -1173,7 +1173,7 @@ static void q6v5_wcss_remove(struct plat
}
static const struct wcss_data wcss_ipq8074_res_init = {
.q6_firmware_name = "IPQ8074/q6_fw.mdt",
.m3_firmware_name = "IPQ8074/m3_fw.mdt",
.crash_reason_smem = WCSS_CRASH_REASON,
-@@ -1190,6 +1190,20 @@ static const struct wcss_data wcss_ipq80
+@@ -1187,6 +1187,20 @@ static const struct wcss_data wcss_ipq80
.need_auto_boot = false,
};
static const struct wcss_data wcss_qcs404_res_init = {
.init_clock = qcs404_init_clock,
.init_regulator = qcs404_init_regulator,
-@@ -1209,6 +1223,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1206,6 +1220,7 @@ static const struct wcss_data wcss_qcs40
static const struct of_device_id q6v5_wcss_of_match[] = {
{ .compatible = "qcom,ipq8074-wcss-pil", .data = &wcss_ipq8074_res_init },
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -430,8 +430,21 @@
+@@ -417,8 +417,21 @@
};
tcsr: syscon@1937000 {
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
-@@ -282,6 +282,18 @@ config PWM_INTEL_LGM
+@@ -319,6 +319,18 @@ config PWM_INTEL_LGM
To compile this driver as a module, choose M here: the module
will be called pwm-intel-lgm.
depends on MFD_IQS62X || COMPILE_TEST
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
-@@ -24,6 +24,7 @@ obj-$(CONFIG_PWM_IMX1) += pwm-imx1.o
+@@ -27,6 +27,7 @@ obj-$(CONFIG_PWM_IMX1) += pwm-imx1.o
obj-$(CONFIG_PWM_IMX27) += pwm-imx27.o
obj-$(CONFIG_PWM_IMX_TPM) += pwm-imx-tpm.o
obj-$(CONFIG_PWM_INTEL_LGM) += pwm-intel-lgm.o
+++ /dev/null
-From: Devi Priya <quic_devipriy@quicinc.com>
-Subject: [PATCH] dt-bindings: mfd: qcom,tcsr: Add simple-mfd support for IPQ6018
-Date: Thu, 5 Oct 2023 21:35:49 +0530
-
-Update the binding to include pwm as the child node to TCSR block and
-add simple-mfd support for IPQ6018.
-
-Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
----
- .../devicetree/bindings/mfd/qcom,tcsr.yaml | 112 +++++++++++++-----
- 1 file changed, 81 insertions(+), 31 deletions(-)
-
---- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
-+++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
-@@ -15,49 +15,101 @@ description:
-
- properties:
- compatible:
-- items:
-- - enum:
-- - qcom,msm8976-tcsr
-- - qcom,msm8998-tcsr
-- - qcom,qcs404-tcsr
-- - qcom,sc7180-tcsr
-- - qcom,sc7280-tcsr
-- - qcom,sc8280xp-tcsr
-- - qcom,sdm630-tcsr
-- - qcom,sdm845-tcsr
-- - qcom,sdx55-tcsr
-- - qcom,sdx65-tcsr
-- - qcom,sm8150-tcsr
-- - qcom,sm8450-tcsr
-- - qcom,tcsr-apq8064
-- - qcom,tcsr-apq8084
-- - qcom,tcsr-ipq5332
-- - qcom,tcsr-ipq6018
-- - qcom,tcsr-ipq8064
-- - qcom,tcsr-ipq8074
-- - qcom,tcsr-ipq9574
-- - qcom,tcsr-mdm9615
-- - qcom,tcsr-msm8226
-- - qcom,tcsr-msm8660
-- - qcom,tcsr-msm8916
-- - qcom,tcsr-msm8953
-- - qcom,tcsr-msm8960
-- - qcom,tcsr-msm8974
-- - qcom,tcsr-msm8996
-- - const: syscon
-+ oneOf:
-+ - items:
-+ - enum:
-+ - qcom,msm8976-tcsr
-+ - qcom,msm8998-tcsr
-+ - qcom,qcs404-tcsr
-+ - qcom,sc7180-tcsr
-+ - qcom,sc7280-tcsr
-+ - qcom,sc8280xp-tcsr
-+ - qcom,sdm630-tcsr
-+ - qcom,sdm845-tcsr
-+ - qcom,sdx55-tcsr
-+ - qcom,sdx65-tcsr
-+ - qcom,sm4450-tcsr
-+ - qcom,sm8150-tcsr
-+ - qcom,sm8450-tcsr
-+ - qcom,tcsr-apq8064
-+ - qcom,tcsr-apq8084
-+ - qcom,tcsr-ipq5332
-+ - qcom,tcsr-ipq8064
-+ - qcom,tcsr-ipq8074
-+ - qcom,tcsr-ipq9574
-+ - qcom,tcsr-mdm9615
-+ - qcom,tcsr-msm8226
-+ - qcom,tcsr-msm8660
-+ - qcom,tcsr-msm8916
-+ - qcom,tcsr-msm8953
-+ - qcom,tcsr-msm8960
-+ - qcom,tcsr-msm8974
-+ - qcom,tcsr-msm8996
-+ - const: syscon
-+ - items:
-+ - const: qcom,tcsr-ipq6018
-+ - const: syscon
-+ - const: simple-mfd
-
- reg:
- maxItems: 1
-
-+ ranges: true
-+
-+ "#address-cells":
-+ const: 1
-+
-+ "#size-cells":
-+ const: 1
-+
-+patternProperties:
-+ "pwm@[a-f0-9]+$":
-+ type: object
-+ $ref: /schemas/pwm/qcom,ipq6018-pwm.yaml
-+
-+
- required:
- - compatible
- - reg
-
-+allOf:
-+ - if:
-+ not:
-+ properties:
-+ compatible:
-+ contains:
-+ enum:
-+ - qcom,tcsr-ipq6018
-+ then:
-+ patternProperties:
-+ "pwm@[a-f0-9]+$": false
-+
- additionalProperties: false
-
- examples:
-+ # Example 1 - Syscon node found on MSM8960
- - |
- syscon@1a400000 {
- compatible = "qcom,tcsr-msm8960", "syscon";
- reg = <0x1a400000 0x100>;
- };
-+ # Example 2 - Syscon node found on IPQ6018
-+ - |
-+ #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
-+
-+ syscon@1937000 {
-+ compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd";
-+ reg = <0x01937000 0x21000>;
-+ ranges = <0 0x1937000 0x21000>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+
-+ pwm: pwm@a010 {
-+ compatible = "qcom,ipq6018-pwm";
-+ reg = <0xa010 0x20>;
-+ clocks = <&gcc GCC_ADSS_PWM_CLK>;
-+ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
-+ assigned-clock-rates = <100000000>;
-+ #pwm-cells = <2>;
-+ };
-+ };
-\ No newline at end of file
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
-@@ -18,6 +18,7 @@ properties:
+@@ -19,6 +19,7 @@ properties:
- enum:
- qcom,apq8064-qfprom
- qcom,apq8084-qfprom
- qcom,msm8956-tsens
- qcom,msm8976-tsens
- qcom,qcs404-tsens
-@@ -232,6 +233,7 @@ allOf:
+@@ -234,6 +235,7 @@ allOf:
compatible:
contains:
enum:
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -974,7 +974,7 @@ int __init init_common(struct tsens_priv
+@@ -975,7 +975,7 @@ int __init init_common(struct tsens_priv
ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
if (ret)
goto err_put_device;
+};
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -1101,6 +1101,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
+@@ -1102,6 +1102,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
static const struct of_device_id tsens_table[] = {
{
}, {
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
-@@ -645,7 +645,7 @@ extern struct tsens_plat_data data_8960;
+@@ -650,7 +650,7 @@ extern struct tsens_plat_data data_8960;
extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8974, data_9607;
/* TSENS v1 targets */
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -149,6 +149,117 @@
+@@ -147,6 +147,117 @@
status = "disabled";
};
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5018-tlmm";
reg = <0x01000000 0x300000>;
-@@ -391,6 +502,64 @@
+@@ -388,6 +499,64 @@
};
};
};
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -260,6 +260,40 @@
+@@ -258,6 +258,40 @@
#thermal-sensor-cells = <1>;
};
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5018-tlmm";
reg = <0x01000000 0x300000>;
-@@ -283,8 +317,8 @@
+@@ -281,8 +315,8 @@
reg = <0x01800000 0x80000>;
clocks = <&xo_board_clk>,
<&sleep_clk>,
<0>,
<0>,
<0>,
-@@ -501,6 +535,208 @@
+@@ -498,6 +532,208 @@
status = "disabled";
};
};
+++ /dev/null
-From: George Moussalem <george.moussalem@outlook.com>
-Subject: [PATCH] dt-bindings: mfd: qcom,tcsr: Add IPQ5018 compatible
-Date: Sun, 06 Oct 2024 16:34:11 +0400
-
-Document the qcom,tcsr-ipq5018 compatible.
-
-Signed-off-by: George Moussalem <george.moussalem@outlook.com>
----
---- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
-+++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml
-@@ -33,6 +33,7 @@ properties:
- - qcom,sm8450-tcsr
- - qcom,tcsr-apq8064
- - qcom,tcsr-apq8084
-+ - qcom,tcsr-ipq5018
- - qcom,tcsr-ipq5332
- - qcom,tcsr-ipq8064
- - qcom,tcsr-ipq8074
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -335,6 +335,11 @@
+@@ -332,6 +332,11 @@
#hwlock-cells = <1>;
};
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -82,6 +82,7 @@
+@@ -80,6 +80,7 @@
scm {
compatible = "qcom,scm-ipq5018", "qcom,scm";
qcom,sdi-enabled;
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -341,6 +341,16 @@
+@@ -338,6 +338,16 @@
reg = <0x01937000 0x21000>;
};
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -295,6 +295,30 @@
+@@ -293,6 +293,30 @@
status = "disabled";
};
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -222,6 +222,14 @@
+@@ -220,6 +220,14 @@
};
};
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -420,6 +420,16 @@
+@@ -417,6 +417,16 @@
status = "disabled";
};
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -444,6 +444,21 @@
+@@ -441,6 +441,21 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -459,6 +459,36 @@
+@@ -456,6 +456,36 @@
status = "disabled";
};
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
-@@ -139,6 +139,16 @@ config IPQ_APSS_6018
+@@ -190,6 +190,16 @@ config IPQ_APSS_6018
Say Y if you want to support CPU frequency scaling on
ipq based devices.
help
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
-@@ -23,6 +23,7 @@ obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8
- obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
+@@ -29,6 +29,7 @@ obj-$(CONFIG_CLK_X1E80100_TCSRCC) += tcs
+ obj-$(CONFIG_CLK_QCM2290_GPUCC) += gpucc-qcm2290.o
obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
obj-$(CONFIG_IPQ_APSS_6018) += apss-ipq6018.o
+obj-$(CONFIG_IPQ_CMN_PLL) += clk-ipq-cmn-pll.o
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
-@@ -141,7 +141,6 @@ config IPQ_APSS_6018
+@@ -192,7 +192,6 @@ config IPQ_APSS_6018
config IPQ_CMN_PLL
tristate "IPQ CMN PLL Clock Controller"
sleep_clk: sleep-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
-@@ -150,6 +156,19 @@
+@@ -148,6 +154,19 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -156,6 +156,30 @@
+@@ -154,6 +154,30 @@
status = "disabled";
};
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -166,6 +166,21 @@
+@@ -164,6 +164,21 @@
clock-names = "gcc_mdio_ahb_clk";
status = "disabled";
};
mdio1: mdio@90000 {
-@@ -396,8 +411,8 @@
+@@ -394,8 +409,8 @@
<&pcie0_phy>,
<&pcie1_phy>,
<0>,
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
-@@ -677,7 +677,7 @@ static const struct freq_tbl ftbl_gmac1_
+@@ -678,7 +678,7 @@ static const struct freq_tbl ftbl_gmac1_
F(2500000, P_UNIPHY_RX, 12.5, 0, 0),
F(24000000, P_XO, 1, 0, 0),
F(25000000, P_UNIPHY_RX, 2.5, 0, 0),
F(125000000, P_UNIPHY_RX, 1, 0, 0),
F(312500000, P_UNIPHY_RX, 1, 0, 0),
{ }
-@@ -717,7 +717,7 @@ static const struct freq_tbl ftbl_gmac1_
+@@ -718,7 +718,7 @@ static const struct freq_tbl ftbl_gmac1_
F(2500000, P_UNIPHY_TX, 12.5, 0, 0),
F(24000000, P_XO, 1, 0, 0),
F(25000000, P_UNIPHY_TX, 2.5, 0, 0),
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
-@@ -335,8 +335,8 @@ static const struct parent_map gcc_xo_gp
+@@ -336,8 +336,8 @@ static const struct parent_map gcc_xo_gp
static const struct clk_parent_data gcc_xo_gephy_gcc_rx_gephy_gcc_tx_ubi32_pll_gpll0[] = {
{ .index = DT_XO },
{ .hw = &ubi32_pll.clkr.hw },
{ .hw = &gpll0.clkr.hw },
};
-@@ -351,8 +351,8 @@ static const struct parent_map gcc_xo_ge
+@@ -352,8 +352,8 @@ static const struct parent_map gcc_xo_ge
static const struct clk_parent_data gcc_xo_gephy_gcc_tx_gephy_gcc_rx_ubi32_pll_gpll0[] = {
{ .index = DT_XO },
{ .hw = &ubi32_pll.clkr.hw },
{ .hw = &gpll0.clkr.hw },
};
-@@ -367,8 +367,8 @@ static const struct parent_map gcc_xo_ge
+@@ -368,8 +368,8 @@ static const struct parent_map gcc_xo_ge
static const struct clk_parent_data gcc_xo_uniphy_gcc_rx_uniphy_gcc_tx_ubi32_pll_gpll0[] = {
{ .index = DT_XO },
{ .hw = &ubi32_pll.clkr.hw },
{ .hw = &gpll0.clkr.hw },
};
-@@ -383,8 +383,8 @@ static const struct parent_map gcc_xo_un
+@@ -384,8 +384,8 @@ static const struct parent_map gcc_xo_un
static const struct clk_parent_data gcc_xo_uniphy_gcc_tx_uniphy_gcc_rx_ubi32_pll_gpll0[] = {
{ .index = DT_XO },
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
-@@ -1545,11 +1545,10 @@ static int qca8k_pcs_config(struct phyli
+@@ -1557,11 +1557,10 @@ static int qca8k_pcs_config(struct phyli
return -EINVAL;
}
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
-@@ -1013,7 +1013,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
- return err;
+@@ -1014,7 +1014,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
+ return ret;
}
- if (!dsa_is_user_port(priv->ds, reg))
continue;
of_get_phy_mode(port, &mode);
-@@ -1088,17 +1088,19 @@ qca8k_setup_mac_pwr_sel(struct qca8k_pri
+@@ -1089,17 +1089,19 @@ qca8k_setup_mac_pwr_sel(struct qca8k_pri
static int qca8k_find_cpu_port(struct dsa_switch *ds)
{
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
---
- drivers/firmware/qcom_scm.c | 8 ++++++++
- drivers/firmware/qcom_scm.h | 1 +
+ drivers/firmware/qcom//qcom_scm.c | 8 ++++++++
+ drivers/firmware/qcom//qcom_scm.h | 1 +
2 files changed, 9 insertions(+)
---- a/drivers/firmware/qcom_scm.c
-+++ b/drivers/firmware/qcom_scm.c
-@@ -592,6 +592,14 @@ int qcom_scm_pas_mem_setup(u32 periphera
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -686,6 +686,14 @@ int qcom_scm_pas_mem_setup(u32 periphera
if (ret)
goto disable_clk;
ret = qcom_scm_call(__scm->dev, &desc, &res);
qcom_scm_bw_disable();
---- a/drivers/firmware/qcom_scm.h
-+++ b/drivers/firmware/qcom_scm.h
-@@ -92,6 +92,7 @@ extern int scm_legacy_call(struct device
+--- a/drivers/firmware/qcom/qcom_scm.h
++++ b/drivers/firmware/qcom/qcom_scm.h
+@@ -96,6 +96,7 @@ struct qcom_tzmem_pool *qcom_scm_get_tzm
#define QCOM_SCM_SVC_PIL 0x02
#define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
---
- drivers/firmware/qcom_scm.c | 78 ++++++++++++++++++++++++++
- drivers/firmware/qcom_scm.h | 2 +
+ drivers/firmware/qcom//qcom_scm.c | 78 ++++++++++++++++++++++++++
+ drivers/firmware/qcom//qcom_scm.h | 2 +
include/linux/firmware/qcom/qcom_scm.h | 2 +
3 files changed, 82 insertions(+)
---- a/drivers/firmware/qcom_scm.c
-+++ b/drivers/firmware/qcom_scm.c
-@@ -712,6 +712,84 @@ bool qcom_scm_pas_supported(u32 peripher
+--- a/include/linux/firmware/qcom/qcom_scm.h
++++ b/include/linux/firmware/qcom/qcom_scm.h
+@@ -79,6 +79,8 @@ int qcom_scm_pas_mem_setup(u32 periphera
+ int qcom_scm_pas_auth_and_reset(u32 peripheral);
+ int qcom_scm_pas_shutdown(u32 peripheral);
+ bool qcom_scm_pas_supported(u32 peripheral);
++int qcom_scm_msa_lock(u32 peripheral);
++int qcom_scm_msa_unlock(u32 peripheral);
+
+ int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
+ int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -806,6 +806,84 @@ bool qcom_scm_pas_supported(u32 peripher
}
EXPORT_SYMBOL_GPL(qcom_scm_pas_supported);
static int __qcom_scm_pas_mss_reset(struct device *dev, bool reset)
{
struct qcom_scm_desc desc = {
---- a/drivers/firmware/qcom_scm.h
-+++ b/drivers/firmware/qcom_scm.h
-@@ -98,6 +98,8 @@ extern int scm_legacy_call(struct device
+--- a/drivers/firmware/qcom/qcom_scm.h
++++ b/drivers/firmware/qcom/qcom_scm.h
+@@ -102,6 +102,8 @@ struct qcom_tzmem_pool *qcom_scm_get_tzm
#define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06
#define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07
#define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a
#define QCOM_SCM_SVC_IO 0x05
#define QCOM_SCM_IO_READ 0x01
---- a/include/linux/firmware/qcom/qcom_scm.h
-+++ b/include/linux/firmware/qcom/qcom_scm.h
-@@ -81,6 +81,8 @@ extern int qcom_scm_pas_mem_setup(u32 pe
- extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
- extern int qcom_scm_pas_shutdown(u32 peripheral);
- extern bool qcom_scm_pas_supported(u32 peripheral);
-+extern int qcom_scm_msa_lock(u32 peripheral);
-+extern int qcom_scm_msa_unlock(u32 peripheral);
-
- extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
- extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
-@@ -234,6 +234,25 @@ config QCOM_Q6V5_PAS
+@@ -235,6 +235,25 @@ config QCOM_Q6V5_PAS
CDSP (Compute DSP), MPSS (Modem Peripheral SubSystem), and
SLPI (Sensor Low Power Island).
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
- drivers/firmware/qcom_scm.c | 79 ++++++++++++++++++++++++++
- drivers/firmware/qcom_scm.h | 3 +
+ drivers/firmware/qcom//qcom_scm.c | 79 ++++++++++++++++++++++++++
+ drivers/firmware/qcom//qcom_scm.h | 3 +
include/linux/firmware/qcom/qcom_scm.h | 3 +
3 files changed, 85 insertions(+)
---- a/drivers/firmware/qcom_scm.c
-+++ b/drivers/firmware/qcom_scm.c
-@@ -713,6 +713,85 @@ bool qcom_scm_pas_supported(u32 peripher
+--- a/include/linux/firmware/qcom/qcom_scm.h
++++ b/include/linux/firmware/qcom/qcom_scm.h
+@@ -79,6 +79,9 @@ int qcom_scm_pas_mem_setup(u32 periphera
+ int qcom_scm_pas_auth_and_reset(u32 peripheral);
+ int qcom_scm_pas_shutdown(u32 peripheral);
+ bool qcom_scm_pas_supported(u32 peripheral);
++int qcom_scm_internal_wifi_powerup(u32 peripheral);
++int qcom_scm_internal_wifi_shutdown(u32 peripheral);
++int qcom_scm_pas_load_segment(u32 peripheral, int segment, dma_addr_t dma, int seg_cnt);
+ int qcom_scm_msa_lock(u32 peripheral);
+ int qcom_scm_msa_unlock(u32 peripheral);
+
+--- a/drivers/firmware/qcom/qcom_scm.c
++++ b/drivers/firmware/qcom/qcom_scm.c
+@@ -807,6 +807,85 @@ bool qcom_scm_pas_supported(u32 peripher
EXPORT_SYMBOL_GPL(qcom_scm_pas_supported);
/**
* qcom_scm_msa_lock() - Lock given peripheral firmware region as MSA
*
* @peripheral: peripheral id
---- a/drivers/firmware/qcom_scm.h
-+++ b/drivers/firmware/qcom_scm.h
-@@ -98,6 +98,9 @@ extern int scm_legacy_call(struct device
+--- a/drivers/firmware/qcom/qcom_scm.h
++++ b/drivers/firmware/qcom/qcom_scm.h
+@@ -102,6 +102,9 @@ struct qcom_tzmem_pool *qcom_scm_get_tzm
#define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06
#define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07
#define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a
#define QCOM_SCM_MSA_LOCK 0x24
#define QCOM_SCM_MSA_UNLOCK 0x25
---- a/include/linux/firmware/qcom/qcom_scm.h
-+++ b/include/linux/firmware/qcom/qcom_scm.h
-@@ -81,6 +81,9 @@ extern int qcom_scm_pas_mem_setup(u32 pe
- extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
- extern int qcom_scm_pas_shutdown(u32 peripheral);
- extern bool qcom_scm_pas_supported(u32 peripheral);
-+extern int qcom_scm_internal_wifi_powerup(u32 peripheral);
-+extern int qcom_scm_internal_wifi_shutdown(u32 peripheral);
-+extern int qcom_scm_pas_load_segment(u32 peripheral, int segment, dma_addr_t dma, int seg_cnt);
- extern int qcom_scm_msa_lock(u32 peripheral);
- extern int qcom_scm_msa_unlock(u32 peripheral);
-
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
-@@ -16,6 +16,16 @@
+@@ -17,6 +17,16 @@
#include <linux/sizes.h>
#include <linux/slab.h>
#include <linux/soc/qcom/mdt_loader.h>
static bool mdt_phdr_valid(const struct elf32_phdr *phdr)
{
-@@ -69,6 +79,56 @@ static ssize_t mdt_load_split_segment(vo
+@@ -67,6 +77,56 @@ static ssize_t mdt_load_split_segment(vo
return ret;
}
/**
* qcom_mdt_get_size() - acquire size of the memory region needed to load mdt
* @fw: firmware object for the mdt file
-@@ -295,7 +355,8 @@ static bool qcom_mdt_bins_are_split(cons
+@@ -293,7 +353,8 @@ static bool qcom_mdt_bins_are_split(cons
static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
const char *fw_name, int pas_id, void *mem_region,
phys_addr_t mem_phys, size_t mem_size,
{
const struct elf32_phdr *phdrs;
const struct elf32_phdr *phdr;
-@@ -349,6 +410,14 @@ static int __qcom_mdt_load(struct device
+@@ -347,6 +408,14 @@ static int __qcom_mdt_load(struct device
if (!mdt_phdr_valid(phdr))
continue;
offset = phdr->p_paddr - mem_reloc;
if (offset < 0 || offset + phdr->p_memsz > mem_size) {
dev_err(dev, "segment outside memory range\n");
-@@ -366,7 +435,11 @@ static int __qcom_mdt_load(struct device
+@@ -364,7 +433,11 @@ static int __qcom_mdt_load(struct device
ptr = mem_region + offset;
/* Firmware is large enough to be non-split */
if (phdr->p_offset + phdr->p_filesz > fw->size) {
dev_err(dev, "file %s segment %d would be truncated\n",
-@@ -383,7 +456,7 @@ static int __qcom_mdt_load(struct device
+@@ -381,7 +454,7 @@ static int __qcom_mdt_load(struct device
break;
}
memset(ptr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz);
}
-@@ -418,7 +491,7 @@ int qcom_mdt_load(struct device *dev, co
+@@ -416,7 +489,7 @@ int qcom_mdt_load(struct device *dev, co
return ret;
return __qcom_mdt_load(dev, fw, firmware, pas_id, mem_region, mem_phys,
}
EXPORT_SYMBOL_GPL(qcom_mdt_load);
-@@ -441,9 +514,36 @@ int qcom_mdt_load_no_init(struct device
+@@ -439,9 +512,36 @@ int qcom_mdt_load_no_init(struct device
size_t mem_size, phys_addr_t *reloc_base)
{
return __qcom_mdt_load(dev, fw, firmware, pas_id, mem_region, mem_phys,
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -697,6 +697,225 @@
+@@ -694,6 +694,225 @@
};
};
---
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -113,6 +113,11 @@
+@@ -111,6 +111,11 @@
#size-cells = <2>;
ranges;
---
--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
-@@ -21,6 +21,7 @@ properties:
+@@ -22,6 +22,7 @@ properties:
- qcom,ipq6018-wifi
- qcom,wcn6750-wifi
- qcom,ipq5018-wifi
reg:
maxItems: 1
-@@ -258,6 +259,29 @@ allOf:
+@@ -262,6 +263,29 @@ allOf:
- description: interrupt event for ring DP20
- description: interrupt event for ring DP21
- description: interrupt event for ring DP22
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
-@@ -1,3 +1,4 @@
- # SPDX-License-Identifier: GPL-2.0-only
+@@ -2,3 +2,4 @@
source "drivers/power/reset/Kconfig"
+ source "drivers/power/sequencing/Kconfig"
source "drivers/power/supply/Kconfig"
+source "drivers/power/qcom/Kconfig"
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
-@@ -1,3 +1,4 @@
- # SPDX-License-Identifier: GPL-2.0-only
+@@ -2,3 +2,4 @@
obj-$(CONFIG_POWER_RESET) += reset/
+ obj-$(CONFIG_POWER_SEQUENCING) += sequencing/
obj-$(CONFIG_POWER_SUPPLY) += supply/
+obj-$(CONFIG_QCOM_APM) += qcom/
--- /dev/null
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
-@@ -1663,4 +1663,37 @@ config REGULATOR_QCOM_LABIBB
+@@ -1720,4 +1720,37 @@ config REGULATOR_QCOM_LABIBB
boost regulator and IBB can be used as a negative boost regulator
for LCD display panel.
endif
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
-@@ -116,6 +116,9 @@ obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qco
+@@ -121,6 +121,9 @@ obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qco
obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o
obj-$(CONFIG_REGULATOR_QCOM_SPMI) += qcom_spmi-regulator.o
obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) += qcom_usb_vbus-regulator.o
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
-@@ -1142,8 +1142,8 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1143,9 +1143,9 @@ static int q6v5_wcss_probe(struct platfo
if (ret)
- goto free_rproc;
+ return ret;
- qcom_add_glink_subdev(rproc, &wcss->glink_subdev, "q6wcss");
-- qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, "q6wcss");
+ qcom_add_glink_subdev(rproc, &wcss->glink_subdev, desc->ssr_name);
+ qcom_add_pdm_subdev(rproc, &wcss->pdm_subdev);
+- qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, "q6wcss");
+ qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, desc->ssr_name);
if (desc->ssctl_id)
wcss->sysmon = qcom_add_sysmon_subdev(rproc,
-@@ -1198,7 +1198,7 @@ static const struct wcss_data wcss_ipq60
+@@ -1195,7 +1195,7 @@ static const struct wcss_data wcss_ipq60
.aon_reset_required = true,
.wcss_q6_reset_required = true,
.bcr_reset_required = false,
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -818,6 +818,102 @@
+@@ -834,6 +834,102 @@
};
};
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -1176,6 +1176,7 @@
+@@ -1186,6 +1186,7 @@
wcss_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
--- a/drivers/soc/qcom/smp2p.c
+++ b/drivers/soc/qcom/smp2p.c
-@@ -158,6 +158,8 @@ struct qcom_smp2p {
+@@ -159,6 +159,8 @@ struct qcom_smp2p {
struct list_head inbound;
struct list_head outbound;
+ bool need_ssr_ack;
};
- static void qcom_smp2p_kick(struct qcom_smp2p *smp2p)
-@@ -306,7 +308,7 @@ static irqreturn_t qcom_smp2p_intr(int i
+ #define CREATE_TRACE_POINTS
+@@ -316,7 +318,7 @@ static irqreturn_t qcom_smp2p_intr(int i
ack_restart = qcom_smp2p_check_ssr(smp2p);
qcom_smp2p_notify_in(smp2p);
qcom_smp2p_do_ssr_ack(smp2p);
}
-@@ -427,6 +429,7 @@ static int qcom_smp2p_outbound_entry(str
+@@ -447,6 +449,7 @@ static int qcom_smp2p_outbound_entry(str
/* Make the logical entry reference the physical value */
entry->value = &out->entries[out->valid_entries].value;
struct regulator *cx_supply;
struct qcom_sysmon *sysmon;
-@@ -259,6 +260,9 @@ static int q6v5_wcss_start(struct rproc
+@@ -260,6 +261,9 @@ static int q6v5_wcss_start(struct rproc
return ret;
}
qcom_q6v5_prepare(&wcss->q6v5);
if (wcss->need_mem_protection) {
-@@ -772,6 +776,8 @@ static int q6v5_wcss_stop(struct rproc *
+@@ -773,6 +777,8 @@ static int q6v5_wcss_stop(struct rproc *
}
pas_done:
clk_disable_unprepare(wcss->prng_clk);
qcom_q6v5_unprepare(&wcss->q6v5);
-@@ -980,6 +986,12 @@ static int ipq_init_clock(struct q6v5_wc
+@@ -981,6 +987,12 @@ static int ipq_init_clock(struct q6v5_wc
dev_err(wcss->dev, "Failed to get prng clock\n");
return ret;
}
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -939,8 +939,8 @@
+@@ -955,8 +955,8 @@
"wcss_reset",
"wcss_q6_reset";
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -1158,6 +1158,14 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1021,6 +1021,14 @@ int __init early_init_dt_scan_chosen(cha
const void *rng_seed;
const void *fdt = initial_boot_params;
node = fdt_path_offset(fdt, "/chosen");
if (node < 0)
node = fdt_path_offset(fdt, "/chosen@0");
-@@ -1186,6 +1194,69 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1049,6 +1057,69 @@ int __init early_init_dt_scan_chosen(cha
p = of_get_flat_dt_prop(node, "bootargs", &l);
if (p != NULL && l > 0)
strscpy(cmdline, p, min(l, COMMAND_LINE_SIZE));
projects / thirdparty / openwrt.git / commitdiff
