u32 rd_cmd = RADIO_RSP_RD_CMD;
rd_cmd |= i << RADIO_RSP_ADDR_POS;
- iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
- *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
+ iwl_trans_write_prph(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
+ *pos = (u8)iwl_trans_read_prph(fwrt->trans, RSP_RADIO_RDDAT);
pos++;
}
u32 i;
for (i = 0; i < len_bytes; i += 4)
- *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
+ *data++ = cpu_to_le32(iwl_trans_read_prph(trans, start + i));
}
static void iwl_dump_prph(struct iwl_fw_runtime *fwrt,
continue;
}
- iwl_write_prph_no_grab(fwrt->trans, indirect_wr_addr,
- WMAL_INDRCT_CMD(addr + i));
+ iwl_trans_write_prph(fwrt->trans, indirect_wr_addr,
+ WMAL_INDRCT_CMD(addr + i));
if (fwrt->trans->info.hw_rf_id != IWL_CFG_RF_TYPE_JF1 &&
fwrt->trans->info.hw_rf_id != IWL_CFG_RF_TYPE_JF2 &&
fwrt->trans->info.hw_rf_id != IWL_CFG_RF_TYPE_HR1 &&
fwrt->trans->info.hw_rf_id != IWL_CFG_RF_TYPE_HR2) {
udelay(2);
- prph_stts = iwl_read_prph_no_grab(fwrt->trans,
- WMAL_MRSPF_STTS);
+ prph_stts = iwl_trans_read_prph(fwrt->trans,
+ WMAL_MRSPF_STTS);
/* Abort dump if status is 0xA5A5A5A2 or FIFO1 empty */
if (prph_stts == WMAL_TIMEOUT_VAL ||
break;
}
- prph_val = iwl_read_prph_no_grab(fwrt->trans,
- indirect_rd_addr);
+ prph_val = iwl_trans_read_prph(fwrt->trans,
+ indirect_rd_addr);
*val++ = cpu_to_le32(prph_val);
}
range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
range->range_data_size = cpu_to_le32(iter->fifo_size + registers_size);
- iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
+ iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
/*
* read txf registers. for each register, write to the dump the
addr = le32_to_cpu(reg->addrs[i]) + offs;
reg_dump->addr = cpu_to_le32(addr);
- reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
- addr));
+ reg_dump->data = cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
+ addr));
reg_dump++;
}
}
/* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
- iwl_write_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
- TXF_WR_PTR + offs);
+ iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
+ TXF_WR_PTR + offs);
/* Dummy-read to advance the read pointer to the head */
- iwl_read_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
+ iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
/* Read FIFO */
addr = TXF_READ_MODIFY_DATA + offs;
data = (void *)reg_dump;
for (i = 0; i < iter->fifo_size; i += sizeof(*data))
- *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
+ *data++ = cpu_to_le32(iwl_trans_read_prph(fwrt->trans, addr));
if (fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
fwrt->sanitize_ops->frob_txf(fwrt->sanitize_ctx,
continue;
}
- iwl_write_prph_no_grab(fwrt->trans, indirect_rd_wr_addr,
- addr + i);
+ iwl_trans_write_prph(fwrt->trans, indirect_rd_wr_addr,
+ addr + i);
/* wait a bit for value to be ready in register */
udelay(1);
- prph_val = iwl_read_prph_no_grab(fwrt->trans,
- indirect_rd_wr_addr);
+ prph_val = iwl_trans_read_prph(fwrt->trans,
+ indirect_rd_wr_addr);
*val++ = cpu_to_le32((prph_val & DPHYIP_INDIRECT_RD_MSK) >>
DPHYIP_INDIRECT_RD_SHIFT);
}
addr = le32_to_cpu(reg->addrs[i]) + offs;
reg_dump->addr = cpu_to_le32(addr);
- reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
- addr));
+ reg_dump->data = cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
+ addr));
reg_dump++;
}
offs = rxf_data.offset;
/* Lock fence */
- iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
+ iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
/* Set fence pointer to the same place like WR pointer */
- iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
+ iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
/* Set fence offset */
- iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
- 0x0);
+ iwl_trans_write_prph(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs, 0x0);
/* Read FIFO */
addr = RXF_FIFO_RD_FENCE_INC + offs;
data = (void *)reg_dump;
for (i = 0; i < rxf_data.size; i += sizeof(*data))
- *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
+ *data++ = cpu_to_le32(iwl_trans_read_prph(fwrt->trans, addr));
out:
iwl_trans_release_nic_access(fwrt->trans);
range->range_data_size = reg->dev_addr.size;
for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) {
- prph_data = iwl_read_prph_no_grab(fwrt->trans, (i % 2) ?
- DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :
- DBGI_SRAM_TARGET_ACCESS_RDATA_LSB);
+ prph_data =
+ iwl_trans_read_prph(fwrt->trans,
+ (i % 2) ?
+ DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :
+ DBGI_SRAM_TARGET_ACCESS_RDATA_LSB);
if (iwl_trans_is_hw_error_value(prph_data)) {
iwl_trans_release_nic_access(fwrt->trans);
return -EBUSY;
if (!reg_info || !reg_info->addr || !reg_info->mask)
return 0;
- val = iwl_read_prph_no_grab(fwrt->trans, reg_info->addr + offs);
+ val = iwl_trans_read_prph(fwrt->trans, reg_info->addr + offs);
return cpu_to_le32(mask_apply_and_normalize(val, reg_info->mask));
}