327639 vex amd64->IR pcmpestri SSE4.2 instruction is unsupported 0x34
327837 dwz compressed alternate .debug_info and .debug_str not read correctly
327916 DW_TAG_typedef may have no name
+327943 s390x: add a redirection for the 'index' function
328100 XABORT not implemented
328205 Implement additional Xen hypercalls
328454 add support Backtraces with ARM unwind tables (EXIDX)
}
# elif defined(VGP_s390x_linux)
- /* nothing so far */
+ if (0==VG_(strcmp)("Memcheck", VG_(details).name)) {
+ // added in rsponse to BZ 327943
+ add_hardwired_spec("ld64.so.1", "index",
+ (Addr)&VG_(s390x_linux_REDIR_FOR_index),
+ complain_about_stripped_glibc_ldso);
+ }
# elif defined(VGP_mips32_linux)
if (0==VG_(strcmp)("Memcheck", VG_(details).name)) {
svc __NR_rt_sigreturn
.short 0
+.global VG_(s390x_linux_REDIR_FOR_index)
+.type VG_(s390x_linux_REDIR_FOR_index),@function
+VG_(s390x_linux_REDIR_FOR_index):
+#
+# %r2 = addess of string
+# %r3 = character to find
+#
+ lghi %r0,255
+ ngr %r0,%r3 # r0 = (unsigned char)r3
+ lghi %r4,0
+.L1:
+ llgc %r1,0(%r2) # r1 = byte from string
+ cr %r1,%r0 # compare
+ ber %r14 # return if found
+ cr %r1,%r4 # end of string ?
+ je .L2
+ aghi %r2,1 # increment r2
+ j .L1
+.L2: lghi %r2,0 # return value 0
+ br %r14
+.size VG_(s390x_linux_REDIR_FOR_index), .-VG_(s390x_linux_REDIR_FOR_index)
+
.globl VG_(trampoline_stuff_end)
VG_(trampoline_stuff_end):
.fill 2048, 2, 0x0000
#if defined(VGP_s390x_linux)
extern Addr VG_(s390x_linux_SUBST_FOR_sigreturn);
extern Addr VG_(s390x_linux_SUBST_FOR_rt_sigreturn);
+// Note: Long for the 2nd parameter because according to z-series ABI,
+// section "Parameter Passing" SIMPLE_ARG:
+// "Values shorter than 64 bits are sign- or zero-extended
+// (as appropriate) to 64 bits."
+extern void* VG_(s390x_linux_REDIR_FOR_index) ( void*, Long );
#endif
#if defined(VGP_mips32_linux)
=== other/s390 =========================================================
-327943 s390x missing index/strchr suppression for ld.so (bad backtrace?)
=== other/MacOS ========================================================