mtd: spinand: esmt: OTP access for F50{L,D}1G41LB

Support for OTP area access on ESMT F50L1G41LB and F50D1G41LB chips.

Signed-off-by: Martin Kurbanov <mmkurbanov@salutedevices.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c
index 323a20901fc9fcc252b8317d9434aabf5e30a495..a164d821464d27c5a0410a7c7c611c24ce4a7e05 100644 (file)
--- a/drivers/mtd/nand/spi/esmt.c
+++ b/drivers/mtd/nand/spi/esmt.c
@@ -8,10 +8,15 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/mtd/spinand.h>
+#include <linux/spi/spi-mem.h>
 
 /* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
 #define SPINAND_MFR_ESMT_C8                    0xc8
 
+#define ESMT_F50L1G41LB_CFG_OTP_PROTECT                BIT(7)
+#define ESMT_F50L1G41LB_CFG_OTP_LOCK           \
+       (CFG_OTP_ENABLE | ESMT_F50L1G41LB_CFG_OTP_PROTECT)
+
 static SPINAND_OP_VARIANTS(read_cache_variants,
                           SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
                           SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
@@ -102,6 +107,83 @@ static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
        .free = f50l1g41lb_ooblayout_free,
 };
 
+static int f50l1g41lb_otp_info(struct spinand_device *spinand, size_t len,
+                              struct otp_info *buf, size_t *retlen, bool user)
+{
+       if (len < sizeof(*buf))
+               return -EINVAL;
+
+       buf->locked = 0;
+       buf->start = 0;
+       buf->length = user ? spinand_user_otp_size(spinand) :
+                            spinand_fact_otp_size(spinand);
+
+       *retlen = sizeof(*buf);
+       return 0;
+}
+
+static int f50l1g41lb_fact_otp_info(struct spinand_device *spinand, size_t len,
+                                   struct otp_info *buf, size_t *retlen)
+{
+       return f50l1g41lb_otp_info(spinand, len, buf, retlen, false);
+}
+
+static int f50l1g41lb_user_otp_info(struct spinand_device *spinand, size_t len,
+                                   struct otp_info *buf, size_t *retlen)
+{
+       return f50l1g41lb_otp_info(spinand, len, buf, retlen, true);
+}
+
+static int f50l1g41lb_otp_lock(struct spinand_device *spinand, loff_t from,
+                              size_t len)
+{
+       struct spi_mem_op write_op = SPINAND_WR_EN_DIS_OP(true);
+       struct spi_mem_op exec_op = SPINAND_PROG_EXEC_OP(0);
+       u8 status;
+       int ret;
+
+       ret = spinand_upd_cfg(spinand, ESMT_F50L1G41LB_CFG_OTP_LOCK,
+                             ESMT_F50L1G41LB_CFG_OTP_LOCK);
+       if (!ret)
+               return ret;
+
+       ret = spi_mem_exec_op(spinand->spimem, &write_op);
+       if (!ret)
+               goto out;
+
+       ret = spi_mem_exec_op(spinand->spimem, &exec_op);
+       if (!ret)
+               goto out;
+
+       ret = spinand_wait(spinand,
+                          SPINAND_WRITE_INITIAL_DELAY_US,
+                          SPINAND_WRITE_POLL_DELAY_US,
+                          &status);
+       if (!ret && (status & STATUS_PROG_FAILED))
+               ret = -EIO;
+
+out:
+       if (spinand_upd_cfg(spinand, ESMT_F50L1G41LB_CFG_OTP_LOCK, 0)) {
+               dev_warn(&spinand_to_mtd(spinand)->dev,
+                        "Can not disable OTP mode\n");
+               ret = -EIO;
+       }
+
+       return ret;
+}
+
+static const struct spinand_user_otp_ops f50l1g41lb_user_otp_ops = {
+       .info = f50l1g41lb_user_otp_info,
+       .lock = f50l1g41lb_otp_lock,
+       .read = spinand_user_otp_read,
+       .write = spinand_user_otp_write,
+};
+
+static const struct spinand_fact_otp_ops f50l1g41lb_fact_otp_ops = {
+       .info = f50l1g41lb_fact_otp_info,
+       .read = spinand_fact_otp_read,
+};
+
 static const struct spinand_info esmt_c8_spinand_table[] = {
        SPINAND_INFO("F50L1G41LB",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
@@ -112,7 +194,9 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
                                              &write_cache_variants,
                                              &update_cache_variants),
                     0,
-                    SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
+                    SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL),
+                    SPINAND_USER_OTP_INFO(28, 2, &f50l1g41lb_user_otp_ops),
+                    SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)),
        SPINAND_INFO("F50D1G41LB",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
                                0x7f, 0x7f),
@@ -122,7 +206,9 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
                                              &write_cache_variants,
                                              &update_cache_variants),
                     0,
-                    SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
+                    SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL),
+                    SPINAND_USER_OTP_INFO(28, 2, &f50l1g41lb_user_otp_ops),
+                    SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)),
        SPINAND_INFO("F50D2G41KA",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51, 0x7f,
                                0x7f, 0x7f),