amdgcn: Fix expansion of builtin for vector fabs operation

2022-11-01  Kwok Cheung Yeung  <kcy@codesourcery.com>

	* config/gcn/gcn.cc (gcn_expand_builtin_1): Fix expansion of
	GCN_BUILTIN_FABSV.

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index b636fa5baf492e286d5088d9f4ad386a4fdb28cb..467a2497fb23f5c2649b6f9f569dec62f7da5347 100644 (file)
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,8 @@
+2022-11-01  Kwok Cheung Yeung  <kcy@codesourcery.com>
+
+       * config/gcn/gcn.cc (gcn_expand_builtin_1): Fix expansion of
+       GCN_BUILTIN_FABSV.
+
 2022-11-01  Marcel Vollweiler  <marcel@codesourcery.com>
 
        * omp-expand-metadirective.cc (omp_expand_metadirective): Add already

diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index d24e7aec9efbd45f4c680f460b7eadb46aa52e6d..08dd3d618c6e401e2a02ec7b4a3286d0abfffa9d 100644 (file)
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -4365,13 +4365,11 @@ gcn_expand_builtin_1 (tree exp, rtx target, rtx /*subtarget */ ,
       {
        if (ignore)
          return target;
-       rtx exec = get_exec (-1);
        rtx arg = force_reg (V64DFmode,
                             expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX,
                                          V64DFmode,
                                          EXPAND_NORMAL));
-       emit_insn (gen_absv64df2_exec
-                  (target, arg, gcn_gen_undef (V64DFmode), exec));
+       emit_insn (gen_absv64df2 (target, arg));
        return target;
       }
     case GCN_BUILTIN_LDEXPVF: