]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
re PR target/91704 ([X86] Codegen for _mm256_cmpgt_epi8 is affected by -funsigned...
authorJakub Jelinek <jakub@redhat.com>
Mon, 9 Sep 2019 10:51:04 +0000 (12:51 +0200)
committerJakub Jelinek <jakub@gcc.gnu.org>
Mon, 9 Sep 2019 10:51:04 +0000 (12:51 +0200)
PR target/91704
* config/i386/avxintrin.h (__v32qs): New typedef.
* config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
instead of __v32qi.

* gcc.target/i386/pr91704.c: New test.

From-SVN: r275509

gcc/ChangeLog
gcc/config/i386/avx2intrin.h
gcc/config/i386/avxintrin.h
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr91704.c [new file with mode: 0644]

index 26d9923808f2063765c2504cea1060c32db11f56..3ee7eef3ccdb53a4ee5b18974c3ccb5d435d9276 100644 (file)
@@ -1,3 +1,10 @@
+2019-09-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/91704
+       * config/i386/avxintrin.h (__v32qs): New typedef.
+       * config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
+       instead of __v32qi.
+
 2019-09-04  Wilco Dijkstra  <wdijkstr@arm.com>
 
        Backport from mainline
index 7606efdbf79225454b2c8907a10ee205899ac8e6..372d77f84fe2b6b68a9cc2e6a4c849f48e1c6c00 100644 (file)
@@ -258,7 +258,7 @@ extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_cmpgt_epi8 (__m256i __A, __m256i __B)
 {
-  return (__m256i) ((__v32qi)__A > (__v32qi)__B);
+  return (__m256i) ((__v32qs)__A > (__v32qs)__B);
 }
 
 extern __inline __m256i
index 29115a11a0d3fe6cc770c853b8876ba3322e4f67..3301451e4deef5ede879fab10b4f81eb2dab8f6e 100644 (file)
@@ -47,6 +47,7 @@ typedef unsigned int __v8su __attribute__ ((__vector_size__ (32)));
 typedef short __v16hi __attribute__ ((__vector_size__ (32)));
 typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32)));
 typedef char __v32qi __attribute__ ((__vector_size__ (32)));
+typedef signed char __v32qs __attribute__ ((__vector_size__ (32)));
 typedef unsigned char __v32qu __attribute__ ((__vector_size__ (32)));
 
 /* The Intel API is flexible enough that we must allow aliasing with other
index ce8dd86c4490ee5a2928b8a6c45dd6764317dbbd..27c86f614f369ae62505d83e0ffe00038b651aaf 100644 (file)
@@ -1,3 +1,8 @@
+2019-09-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/91704
+       * gcc.target/i386/pr91704.c: New test.
+
 2019-09-07  Paul Thomas  <pault@gcc.gnu.org>
 
        Backport from mainline
diff --git a/gcc/testsuite/gcc.target/i386/pr91704.c b/gcc/testsuite/gcc.target/i386/pr91704.c
new file mode 100644 (file)
index 0000000..b996e24
--- /dev/null
@@ -0,0 +1,14 @@
+/* PR target/91704 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -funsigned-char -mavx2 -mavx512f -masm=att" } */
+/* { dg-final { scan-assembler-times "\tvpcmpgtb\t%ymm" 1 } } */
+/* { dg-final { scan-assembler-not "\tvpsubusb\t" } } */
+/* { dg-final { scan-assembler-not "\tvpcmpeqb\t" } } */
+
+#include <x86intrin.h>
+
+__m256i
+foo (__m256i x, __m256i y)
+{
+  return _mm256_cmpgt_epi8 (x, y);
+}