i386: Change mnemonics from V[GETEXP,FPCLASS]PBF16 to V[GETEXP,FPCLASS]BF16

Besides mnemonics change, this patch also fixed SDE test fail for
FPCLASS.

gcc/ChangeLog:

	PR target/118270
	* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
	name according to new mnemonics.
	* config/i386/avx10_2bf16intrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Ditto.
	* config/i386/sse.md
	(UNSPEC_VFPCLASSBF16); Rename from UNSPEC_VFPCLASSPBF16.
	(avx10_2_getexppbf16_<mode><mask_name>): Rename to...
	(avx10_2_getexpbf16_<mode><mask_name>): ...this.
	Change instruction name output.
	(avx10_2_fpclasspbf16_<mode><mask_scalar_merge_name>):
	Rename to...
	(avx10_2_fpclassbf16_<mode><mask_scalar_merge_name>): ...this.
	Change instruction name output.

gcc/testsuite/ChangeLog:

	PR target/118270
	* gcc.target/i386/avx10_2-512-bf16-1.c: Adjust output and
	intrin call.
	* gcc.target/i386/avx10_2-512-vfpclasspbf16-2.c: Move to...
	* gcc.target/i386/avx10_2-512-vfpclassbf16-2.c: ...here.
	Adjust intrin call.
	* gcc.target/i386/avx10_2-512-vgetexppbf16-2.c: Move to...
	* gcc.target/i386/avx10_2-512-vgetexpbf16-2.c: ...here.
	Adjust intrin call.
	* gcc.target/i386/avx10_2-bf16-1.c: Adjust output and
	intrin call.
	* gcc.target/i386/avx10_2-vgetexppbf16-2.c: Move to...
	* gcc.target/i386/avx10_2-vgetexpbf16-2.c: ...here.
	Adjust intrin call.
	* gcc.target/i386/avx10_2-vfpclasspbf16-2.c: Move to...
	* gcc.target/i386/avx10_2-vfpclassbf16-2.c: ...here.
	Adjust intrin call.
	* gcc.target/i386/avx-1.c: Adjust builtin call.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.

diff --git a/gcc/config/i386/avx10_2-512bf16intrin.h b/gcc/config/i386/avx10_2-512bf16intrin.h
index f60ac2cd03ffa6c156252e611fc525bf0b167f79..307b14a878a70b161a8a9b22067835db9c421cff 100644 (file)
--- a/gcc/config/i386/avx10_2-512bf16intrin.h
+++ b/gcc/config/i386/avx10_2-512bf16intrin.h
@@ -446,16 +446,16 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_getexp_pbh (__m512bh __A)
 {
   return (__m512bh)
-    __builtin_ia32_getexppbf16512_mask (__A,
-                                       (__v32bf) _mm512_setzero_si512 (),
-                                       (__mmask32) -1);
+    __builtin_ia32_getexpbf16512_mask (__A,
+                                      (__v32bf) _mm512_setzero_si512 (),
+                                      (__mmask32) -1);
 }
 
 extern __inline__ __m512bh
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_mask_getexp_pbh (__m512bh __W, __mmask32 __U, __m512bh __A)
 {
-  return (__m512bh) __builtin_ia32_getexppbf16512_mask (__A,  __W,  __U);
+  return (__m512bh) __builtin_ia32_getexpbf16512_mask (__A,  __W,  __U);
 }
 
 extern __inline__ __m512bh
@@ -463,9 +463,9 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_maskz_getexp_pbh (__mmask32 __U, __m512bh __A)
 {
   return (__m512bh)
-    __builtin_ia32_getexppbf16512_mask (__A,
-                                       (__v32bf) _mm512_setzero_si512 (),
-                                       __U);
+    __builtin_ia32_getexpbf16512_mask (__A,
+                                      (__v32bf) _mm512_setzero_si512 (),
+                                      __U);
 }
 
 /* Intrinsics vrndscalebf16.  */
@@ -613,7 +613,7 @@ _mm512_maskz_getmant_pbh (__mmask32 __U, __m512bh __A,
 
 #endif /* __OPTIMIZE__ */
 
-/* Intrinsics vfpclasspbf16.  */
+/* Intrinsics vfpclassbf16.  */
 #ifdef __OPTIMIZE__
 extern __inline __mmask32
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -621,7 +621,7 @@ _mm512_mask_fpclass_pbh_mask (__mmask32 __U, __m512bh __A,
                              const int __imm)
 {
   return (__mmask32)
-    __builtin_ia32_fpclasspbf16512_mask (__A, __imm, __U);
+    __builtin_ia32_fpclassbf16512_mask (__A, __imm, __U);
 }
 
 extern __inline __mmask32
@@ -629,17 +629,17 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_fpclass_pbh_mask (__m512bh __A, const int __imm)
 {
   return (__mmask32)
-    __builtin_ia32_fpclasspbf16512_mask (__A, __imm,
-                                        (__mmask32) -1);
+    __builtin_ia32_fpclassbf16512_mask (__A, __imm,
+                                       (__mmask32) -1);
 }
 
 #else
 #define _mm512_mask_fpclass_pbh_mask(U, X, C)                             \
-  ((__mmask32) __builtin_ia32_fpclasspbf16512_mask (                      \
+  ((__mmask32) __builtin_ia32_fpclassbf16512_mask (                       \
       (__v32bf) (__m512bh) (X), (int) (C), (__mmask32) (U)))
 
 #define _mm512_fpclass_pbh_mask(X, C)                                     \
-  ((__mmask32) __builtin_ia32_fpclasspbf16512_mask (                      \
+  ((__mmask32) __builtin_ia32_fpclassbf16512_mask (                       \
       (__v32bf) (__m512bh) (X), (int) (C), (__mmask32) (-1)))
 #endif /* __OPIMTIZE__ */
 

diff --git a/gcc/config/i386/avx10_2bf16intrin.h b/gcc/config/i386/avx10_2bf16intrin.h
index 640e70782f970aa4fae7ec65a42637ae3a9f98f1..e3fa71f27c0be02bbcfb3b8ef93c3dc5f4714853 100644 (file)
--- a/gcc/config/i386/avx10_2bf16intrin.h
+++ b/gcc/config/i386/avx10_2bf16intrin.h
@@ -850,9 +850,9 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_getexp_pbh (__m256bh __A)
 {
   return (__m256bh)
-    __builtin_ia32_getexppbf16256_mask (__A,
-                                       (__v16bf) _mm256_setzero_si256 (),
-                                       (__mmask16) -1);
+    __builtin_ia32_getexpbf16256_mask (__A,
+                                      (__v16bf) _mm256_setzero_si256 (),
+                                      (__mmask16) -1);
 }
 
 extern __inline__ __m256bh
@@ -860,7 +860,7 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_mask_getexp_pbh (__m256bh __W, __mmask16 __U, __m256bh __A)
 {
   return (__m256bh)
-    __builtin_ia32_getexppbf16256_mask (__A, __W, __U);
+    __builtin_ia32_getexpbf16256_mask (__A, __W, __U);
 }
 
 extern __inline__ __m256bh
@@ -868,9 +868,9 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_maskz_getexp_pbh (__mmask16 __U, __m256bh __A)
 {
   return (__m256bh)
-    __builtin_ia32_getexppbf16256_mask (__A,
-                                       (__v16bf) _mm256_setzero_si256 (),
-                                       __U);
+    __builtin_ia32_getexpbf16256_mask (__A,
+                                      (__v16bf) _mm256_setzero_si256 (),
+                                      __U);
 }
 
 extern __inline__ __m128bh
@@ -878,9 +878,9 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_getexp_pbh (__m128bh __A)
 {
   return (__m128bh)
-    __builtin_ia32_getexppbf16128_mask (__A,
-                                       (__v8bf) _mm_setzero_si128 (),
-                                       (__mmask8) -1);
+    __builtin_ia32_getexpbf16128_mask (__A,
+                                      (__v8bf) _mm_setzero_si128 (),
+                                      (__mmask8) -1);
 }
 
 extern __inline__ __m128bh
@@ -888,7 +888,7 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_mask_getexp_pbh (__m128bh __W, __mmask8 __U, __m128bh __A)
 {
   return (__m128bh)
-    __builtin_ia32_getexppbf16128_mask (__A, __W, __U);
+    __builtin_ia32_getexpbf16128_mask (__A, __W, __U);
 }
 
 extern __inline__ __m128bh
@@ -896,9 +896,9 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_maskz_getexp_pbh (__mmask8 __U, __m128bh __A)
 {
   return (__m128bh)
-    __builtin_ia32_getexppbf16128_mask (__A,
-                                       (__v8bf) _mm_setzero_si128 (),
-                                       __U);
+    __builtin_ia32_getexpbf16128_mask (__A,
+                                      (__v8bf) _mm_setzero_si128 (),
+                                      __U);
 }
 
 /* Intrinsics vrndscalebf16.  */
@@ -1178,15 +1178,15 @@ _mm_maskz_getmant_pbh (__mmask8 __U, __m128bh __A,
 
 #endif /* __OPTIMIZE__ */
 
-/* Intrinsics vfpclasspbf16.  */
+/* Intrinsics vfpclassbf16.  */
 #ifdef __OPTIMIZE__
 extern __inline __mmask16
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_mask_fpclass_pbh_mask (__mmask16 __U, __m256bh __A,
-                               const int __imm)
+                             const int __imm)
 {
   return (__mmask16)
-    __builtin_ia32_fpclasspbf16256_mask (__A, __imm, __U);
+    __builtin_ia32_fpclassbf16256_mask (__A, __imm, __U);
 }
 
 extern __inline __mmask16
@@ -1194,7 +1194,7 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_fpclass_pbh_mask (__m256bh __A, const int __imm)
 {
   return (__mmask16)
-    __builtin_ia32_fpclasspbf16256_mask (__A, __imm, (__mmask16) -1);
+    __builtin_ia32_fpclassbf16256_mask (__A, __imm, (__mmask16) -1);
 }
 
 extern __inline __mmask8
@@ -1202,7 +1202,7 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_mask_fpclass_pbh_mask (__mmask8 __U, __m128bh __A, const int __imm)
 {
   return (__mmask8)
-    __builtin_ia32_fpclasspbf16128_mask (__A, __imm, __U);
+    __builtin_ia32_fpclassbf16128_mask (__A, __imm, __U);
 }
 
 extern __inline __mmask8
@@ -1210,23 +1210,23 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_fpclass_pbh_mask (__m128bh __A, const int __imm)
 {
   return (__mmask8)
-    __builtin_ia32_fpclasspbf16128_mask (__A, __imm, (__mmask8) -1);
+    __builtin_ia32_fpclassbf16128_mask (__A, __imm, (__mmask8) -1);
 }
 
 #else
 #define _mm256_mask_fpclass_pbh_mask(U, A, B)                        \
-  ((__mmask16) __builtin_ia32_fpclasspbf16256_mask ((A), (B), (U)))
+  ((__mmask16) __builtin_ia32_fpclassbf16256_mask ((A), (B), (U)))
 
 #define _mm256_fpclass_pbh_mask(A, B)                                \
-  ((__mmask16) __builtin_ia32_fpclasspbf16256_mask ((A), (B),        \
-                                                   (__mmask16) (-1)))
+  ((__mmask16) __builtin_ia32_fpclassbf16256_mask ((A), (B),         \
+                                                  (__mmask16) (-1)))
 
 #define _mm_mask_fpclass_pbh_mask(U, A, B)                           \
-  ((__mmask8) __builtin_ia32_fpclasspbf16128_mask ((A), (B), (U)))
+  ((__mmask8) __builtin_ia32_fpclassbf16128_mask ((A), (B), (U)))
 
 #define _mm_fpclass_pbh_mask(A, B)                                   \
-  ((__mmask8) __builtin_ia32_fpclasspbf16128_mask ((A), (B),         \
-                                                  (__mmask8) (-1)))
+  ((__mmask8) __builtin_ia32_fpclassbf16128_mask ((A), (B),          \
+                                                 (__mmask8) (-1)))
 
 #endif /* __OPIMTIZE__ */
 

diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index a1a5a54b49a600d3d85675d4b7d714b2843b3d99..a546cdcaed92bd2099a373fcafd1c62a0489e4be 100644 (file)
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3266,9 +3266,9 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_sqrtbf16_v8bf_mask, "__
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_rcpbf16_v32bf_mask, "__builtin_ia32_rcpbf16512_mask", IX86_BUILTIN_RCPBF16512_MASK, UNKNOWN, (int) V32BF_FTYPE_V32BF_V32BF_USI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_rcpbf16_v16bf_mask, "__builtin_ia32_rcpbf16256_mask", IX86_BUILTIN_RCPBF16256_MASK, UNKNOWN, (int) V16BF_FTYPE_V16BF_V16BF_UHI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_rcpbf16_v8bf_mask, "__builtin_ia32_rcpbf16128_mask", IX86_BUILTIN_RCPBF16128_MASK, UNKNOWN, (int) V8BF_FTYPE_V8BF_V8BF_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_getexppbf16_v32bf_mask, "__builtin_ia32_getexppbf16512_mask", IX86_BUILTIN_GETEXPPBF16512_MASK, UNKNOWN, (int) V32BF_FTYPE_V32BF_V32BF_USI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_getexppbf16_v16bf_mask, "__builtin_ia32_getexppbf16256_mask", IX86_BUILTIN_GETEXPPBF16256_MASK, UNKNOWN, (int) V16BF_FTYPE_V16BF_V16BF_UHI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_getexppbf16_v8bf_mask, "__builtin_ia32_getexppbf16128_mask", IX86_BUILTIN_GETEXPPBF16128_MASK, UNKNOWN, (int) V8BF_FTYPE_V8BF_V8BF_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_getexpbf16_v32bf_mask, "__builtin_ia32_getexpbf16512_mask", IX86_BUILTIN_GETEXPBF16512_MASK, UNKNOWN, (int) V32BF_FTYPE_V32BF_V32BF_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_getexpbf16_v16bf_mask, "__builtin_ia32_getexpbf16256_mask", IX86_BUILTIN_GETEXPBF16256_MASK, UNKNOWN, (int) V16BF_FTYPE_V16BF_V16BF_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_getexpbf16_v8bf_mask, "__builtin_ia32_getexpbf16128_mask", IX86_BUILTIN_GETEXPBF16128_MASK, UNKNOWN, (int) V8BF_FTYPE_V8BF_V8BF_UQI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_rndscalebf16_v32bf_mask, "__builtin_ia32_rndscalebf16512_mask", IX86_BUILTIN_RNDSCALEBF16512_MASK, UNKNOWN, (int) V32BF_FTYPE_V32BF_INT_V32BF_USI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_rndscalebf16_v16bf_mask, "__builtin_ia32_rndscalebf16256_mask", IX86_BUILTIN_RNDSCALEBF16256_MASK, UNKNOWN, (int) V16BF_FTYPE_V16BF_INT_V16BF_UHI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_rndscalebf16_v8bf_mask, "__builtin_ia32_rndscalebf16128_mask", IX86_BUILTIN_RNDSCALEBF16128_MASK, UNKNOWN, (int) V8BF_FTYPE_V8BF_INT_V8BF_UQI)
@@ -3278,9 +3278,9 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_reducebf16_v8bf_mask, "
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_getmantbf16_v32bf_mask, "__builtin_ia32_getmantbf16512_mask", IX86_BUILTIN_GETMANTBF16512_MASK, UNKNOWN, (int) V32BF_FTYPE_V32BF_INT_V32BF_USI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_getmantbf16_v16bf_mask, "__builtin_ia32_getmantbf16256_mask", IX86_BUILTIN_GETMANTBF16256_MASK, UNKNOWN, (int) V16BF_FTYPE_V16BF_INT_V16BF_UHI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_getmantbf16_v8bf_mask, "__builtin_ia32_getmantbf16128_mask", IX86_BUILTIN_GETMANTBF16128_MASK, UNKNOWN, (int) V8BF_FTYPE_V8BF_INT_V8BF_UQI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_fpclasspbf16_v32bf_mask, "__builtin_ia32_fpclasspbf16512_mask", IX86_BUILTIN_FPCLASSPBF16512_MASK, UNKNOWN, (int) SI_FTYPE_V32BF_INT_USI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_fpclasspbf16_v16bf_mask, "__builtin_ia32_fpclasspbf16256_mask", IX86_BUILTIN_FPCLASSPBF16256_MASK, UNKNOWN, (int) HI_FTYPE_V16BF_INT_UHI)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_fpclasspbf16_v8bf_mask, "__builtin_ia32_fpclasspbf16128_mask", IX86_BUILTIN_FPCLASSPBF16128_MASK, UNKNOWN, (int) QI_FTYPE_V8BF_INT_UQI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_fpclassbf16_v32bf_mask, "__builtin_ia32_fpclassbf16512_mask", IX86_BUILTIN_FPCLASSBF16512_MASK, UNKNOWN, (int) SI_FTYPE_V32BF_INT_USI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_fpclassbf16_v16bf_mask, "__builtin_ia32_fpclassbf16256_mask", IX86_BUILTIN_FPCLASSBF16256_MASK, UNKNOWN, (int) HI_FTYPE_V16BF_INT_UHI)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_fpclassbf16_v8bf_mask, "__builtin_ia32_fpclassbf16128_mask", IX86_BUILTIN_FPCLASSBF16128_MASK, UNKNOWN, (int) QI_FTYPE_V8BF_INT_UQI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cmpbf16_v32bf_mask, "__builtin_ia32_cmpbf16512_mask", IX86_BUILTIN_CMPBF16512_MASK, UNKNOWN, (int) USI_FTYPE_V32BF_V32BF_INT_USI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cmpbf16_v16bf_mask, "__builtin_ia32_cmpbf16256_mask", IX86_BUILTIN_CMPBF16256_MASK, UNKNOWN, (int) UHI_FTYPE_V16BF_V16BF_INT_UHI)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx10_2_cmpbf16_v8bf_mask, "__builtin_ia32_cmpbf16128_mask", IX86_BUILTIN_CMPBF16128_MASK, UNKNOWN, (int) UQI_FTYPE_V8BF_V8BF_INT_UQI)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 1cda62764433fc451a56d6019462057f0ae0b1cb..0bca52848a1efb57c07f815eff2504ad9463ab70 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -233,7 +233,7 @@
   UNSPEC_VRNDSCALEBF16
   UNSPEC_VREDUCEBF16
   UNSPEC_VGETMANTBF16
-  UNSPEC_VFPCLASSPBF16
+  UNSPEC_VFPCLASSBF16
   UNSPEC_VCOMSBF16
   UNSPEC_VCVTNEBF162IBS
   UNSPEC_VCVTNEBF162IUBS
@@ -32397,13 +32397,13 @@
    "vrcpbf16\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
    [(set_attr "prefix" "evex")])
 
-(define_insn "avx10_2_getexppbf16_<mode><mask_name>"
+(define_insn "avx10_2_getexpbf16_<mode><mask_name>"
    [(set (match_operand:VBF_AVX10_2 0 "register_operand" "=v")
         (unspec:VBF_AVX10_2
           [(match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "vm")]
          UNSPEC_GETEXP))]
    "TARGET_AVX10_2_256"
-   "vgetexppbf16\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+   "vgetexpbf16\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
    [(set_attr "prefix" "evex")])
 
 (define_int_iterator BF16IMMOP
@@ -32426,14 +32426,14 @@
    "v<bf16immop>bf16\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
    [(set_attr "prefix" "evex")])
 
-(define_insn "avx10_2_fpclasspbf16_<mode><mask_scalar_merge_name>"
+(define_insn "avx10_2_fpclassbf16_<mode><mask_scalar_merge_name>"
    [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
         (unspec:<avx512fmaskmode>
           [(match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "vm")
            (match_operand 2 "const_0_to_255_operand")]
-         UNSPEC_VFPCLASSPBF16))]
+         UNSPEC_VFPCLASSBF16))]
    "TARGET_AVX10_2_256"
-   "vfpclasspbf16<vecmemsuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
+   "vfpclassbf16<vecmemsuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
    [(set_attr "prefix" "evex")])
 
 (define_insn "avx10_2_cmpbf16_<mode><mask_scalar_merge_name>"

diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c
index ba2a2bb1dad122fea78f1eba16f51d6a64a29af0..dda40af06cc09b4efc9405c7bbc2073a122cbbca 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -1020,7 +1020,7 @@
 #define __builtin_ia32_rndscalebf16512_mask(A, B, C, D) __builtin_ia32_rndscalebf16512_mask(A, 123, C, D)
 #define __builtin_ia32_reducebf16512_mask(A, B, C, D) __builtin_ia32_reducebf16512_mask(A, 123, C, D)
 #define __builtin_ia32_getmantbf16512_mask(A, B, C, D) __builtin_ia32_getmantbf16512_mask(A, 1, C, D)
-#define __builtin_ia32_fpclasspbf16512_mask(A, B, C) __builtin_ia32_fpclasspbf16512_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16512_mask(A, B, C) __builtin_ia32_fpclassbf16512_mask(A, 1, C)
 #define __builtin_ia32_cmpbf16512_mask(A, B, C, D) __builtin_ia32_cmpbf16512_mask(A, B, 1, D)
 
 /* avx10_2bf16intrin.h */
@@ -1030,8 +1030,8 @@
 #define __builtin_ia32_reducebf16128_mask(A, B, C, D) __builtin_ia32_reducebf16128_mask(A, 123, C, D)
 #define __builtin_ia32_getmantbf16256_mask(A, B, C, D) __builtin_ia32_getmantbf16256_mask(A, 1, C, D)
 #define __builtin_ia32_getmantbf16128_mask(A, B, C, D) __builtin_ia32_getmantbf16128_mask(A, 1, C, D)
-#define __builtin_ia32_fpclasspbf16256_mask(A, B, C) __builtin_ia32_fpclasspbf16256_mask(A, 1, C)
-#define __builtin_ia32_fpclasspbf16128_mask(A, B, C) __builtin_ia32_fpclasspbf16128_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16256_mask(A, B, C) __builtin_ia32_fpclassbf16256_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16128_mask(A, B, C) __builtin_ia32_fpclassbf16128_mask(A, 1, C)
 #define __builtin_ia32_cmpbf16256_mask(A, B, C, D) __builtin_ia32_cmpbf16256_mask(A, B, 1, D)
 #define __builtin_ia32_cmpbf16128_mask(A, B, C, D) __builtin_ia32_cmpbf16128_mask(A, B, 1, D)
 

diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c
index c7d47b3ec8ea04007a4d1423d1368fd9addeed16..60121d2bd1e3592efdab692c6a3d43c0f06795ae 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c
@@ -46,9 +46,9 @@
 /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrndscalebf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vrndscalebf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrndscalebf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
@@ -58,8 +58,8 @@
 /* { dg-final { scan-assembler-times "vgetmantbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vgetmantbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vgetmantbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfpclasspbf16z\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfpclasspbf16z\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassbf16z\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassbf16z\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vcmpbf16\[ \\t\]+\\\$1\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%k\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vcmpbf16\[ \\t\]+\\\$2\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%k\[0-9\]\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclasspbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c
similarity index 95%
rename from gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclasspbf16-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c
index ced5913efcc4d170f9bfb27268113ad1a23fd7e0..55b3a83ef1dd3f792a5378d10806ed602c1a04e9 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclasspbf16-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c
@@ -40,6 +40,6 @@ TEST (void)
   res1 = INTRINSIC (_fpclass_pbh_mask) (src1.x, 0x01);
   res2 = INTRINSIC (_mask_fpclass_pbh_mask) (mask, src1.x, 1);
 
-  if (exp != res1 || exp != res2)
+  if (exp != res1 || (mask & exp) != res2)
     abort ();
 }

diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexppbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c
similarity index 100%
rename from gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexppbf16-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c

diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c
index 1e89c5c7f2709e6b7fd98b937d68253bbc377809..9b33b91b3ef0d964fa08e1a734adcbcfe1de16e3 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c
@@ -92,12 +92,12 @@
 /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vgetexppbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrndscalebf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vrndscalebf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vrndscalebf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
@@ -116,10 +116,10 @@
 /* { dg-final { scan-assembler-times "vgetmantbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vgetmantbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vgetmantbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfpclasspbf16y\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfpclasspbf16y\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfpclasspbf16x\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfpclasspbf16x\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassbf16y\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassbf16y\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassbf16x\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassbf16x\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vcmpbf16\[ \\t\]+\\\$1\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%k\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vcmpbf16\[ \\t\]+\\\$2\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%k\[0-9\]\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vcmpbf16\[ \\t\]+\\\$1\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%k\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vgetexppbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c
similarity index 79%
rename from gcc/testsuite/gcc.target/i386/avx10_2-vgetexppbf16-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c
index b5048d1b8090ab470ddff71c8e96245771093eac..40baeca399583a19f300d0f0d603840c20d2b96d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vgetexppbf16-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c
@@ -6,11 +6,11 @@
 #define AVX512VL
 #define AVX512F_LEN 256
 #define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vgetexppbf16-2.c"
+#include "avx10_2-512-vfpclassbf16-2.c"
 
 #undef AVX512F_LEN
 #undef AVX512F_LEN_HALF
 
 #define AVX512F_LEN 128
 #define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vgetexppbf16-2.c" 
+#include "avx10_2-512-vfpclassbf16-2.c" 

diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfpclasspbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c
similarity index 78%
rename from gcc/testsuite/gcc.target/i386/avx10_2-vfpclasspbf16-2.c
rename to gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c
index 38492a80788c9ae329e74b3e65a747f6cfbfcff3..e6a707c40f0453e09cf41f16d09f16fd112c8f91 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vfpclasspbf16-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c
@@ -6,11 +6,11 @@
 #define AVX512VL
 #define AVX512F_LEN 256
 #define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vfpclasspbf16-2.c"
+#include "avx10_2-512-vgetexpbf16-2.c"
 
 #undef AVX512F_LEN
 #undef AVX512F_LEN_HALF
 
 #define AVX512F_LEN 128
 #define AVX512F_LEN_HALF 128
-#include "avx10_2-512-vfpclasspbf16-2.c" 
+#include "avx10_2-512-vgetexpbf16-2.c" 

diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index 73ed7458deb1f2e801c549a076df4a4a499152cb..24187732690991516bbfca64269ff09814952606 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -1028,7 +1028,7 @@
 #define __builtin_ia32_rndscalebf16512_mask(A, B, C, D) __builtin_ia32_rndscalebf16512_mask(A, 123, C, D)
 #define __builtin_ia32_reducebf16512_mask(A, B, C, D) __builtin_ia32_reducebf16512_mask(A, 123, C, D)
 #define __builtin_ia32_getmantbf16512_mask(A, B, C, D) __builtin_ia32_getmantbf16512_mask(A, 1, C, D)
-#define __builtin_ia32_fpclasspbf16512_mask(A, B, C) __builtin_ia32_fpclasspbf16512_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16512_mask(A, B, C) __builtin_ia32_fpclassbf16512_mask(A, 1, C)
 #define __builtin_ia32_cmpbf16512_mask(A, B, C, D) __builtin_ia32_cmpbf16512_mask(A, B, 1, D)
 
 /* avx10_2bf16intrin.h */
@@ -1038,8 +1038,8 @@
 #define __builtin_ia32_reducebf16128_mask(A, B, C, D) __builtin_ia32_reducebf16128_mask(A, 123, C, D)
 #define __builtin_ia32_getmantbf16256_mask(A, B, C, D) __builtin_ia32_getmantbf16256_mask(A, 1, C, D)
 #define __builtin_ia32_getmantbf16128_mask(A, B, C, D) __builtin_ia32_getmantbf16128_mask(A, 1, C, D)
-#define __builtin_ia32_fpclasspbf16256_mask(A, B, C) __builtin_ia32_fpclasspbf16256_mask(A, 1, C)
-#define __builtin_ia32_fpclasspbf16128_mask(A, B, C) __builtin_ia32_fpclasspbf16128_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16256_mask(A, B, C) __builtin_ia32_fpclassbf16256_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16128_mask(A, B, C) __builtin_ia32_fpclassbf16128_mask(A, 1, C)
 #define __builtin_ia32_cmpbf16256_mask(A, B, C, D) __builtin_ia32_cmpbf16256_mask(A, B, 1, D)
 #define __builtin_ia32_cmpbf16128_mask(A, B, C, D) __builtin_ia32_cmpbf16128_mask(A, B, 1, D)
 

diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c
index 428e4f5fc5a713308dd094acee5045c9fbcfd732..26a2d0110e883c234a663fec05e80e7b6f86dc36 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -1002,7 +1002,7 @@
 #define __builtin_ia32_rndscalebf16512_mask(A, B, C, D) __builtin_ia32_rndscalebf16512_mask(A, 123, C, D)
 #define __builtin_ia32_reducebf16512_mask(A, B, C, D) __builtin_ia32_reducebf16512_mask(A, 123, C, D)
 #define __builtin_ia32_getmantbf16512_mask(A, B, C, D) __builtin_ia32_getmantbf16512_mask(A, 1, C, D)
-#define __builtin_ia32_fpclasspbf16512_mask(A, B, C) __builtin_ia32_fpclasspbf16512_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16512_mask(A, B, C) __builtin_ia32_fpclassbf16512_mask(A, 1, C)
 #define __builtin_ia32_cmpbf16512_mask(A, B, C, D) __builtin_ia32_cmpbf16512_mask(A, B, 1, D)
 
 /* avx10_2bf16intrin.h */
@@ -1012,8 +1012,8 @@
 #define __builtin_ia32_reducebf16128_mask(A, B, C, D) __builtin_ia32_reducebf16128_mask(A, 123, C, D)
 #define __builtin_ia32_getmantbf16256_mask(A, B, C, D) __builtin_ia32_getmantbf16256_mask(A, 1, C, D)
 #define __builtin_ia32_getmantbf16128_mask(A, B, C, D) __builtin_ia32_getmantbf16128_mask(A, 1, C, D)
-#define __builtin_ia32_fpclasspbf16256_mask(A, B, C) __builtin_ia32_fpclasspbf16256_mask(A, 1, C)
-#define __builtin_ia32_fpclasspbf16128_mask(A, B, C) __builtin_ia32_fpclasspbf16128_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16256_mask(A, B, C) __builtin_ia32_fpclassbf16256_mask(A, 1, C)
+#define __builtin_ia32_fpclassbf16128_mask(A, B, C) __builtin_ia32_fpclassbf16128_mask(A, 1, C)
 #define __builtin_ia32_cmpbf16256_mask(A, B, C, D) __builtin_ia32_cmpbf16256_mask(A, B, 1, D)
 #define __builtin_ia32_cmpbf16128_mask(A, B, C, D) __builtin_ia32_cmpbf16128_mask(A, B, 1, D)