clk: renesas: r8a779a0: Add 3DGE module clock

Describe the 3DGE module clock needed to operate the PowerVR GPU.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251106211604.2766465-5-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 449611432059bbc811125ef164c731f8c3866a2a..d67dff05d9f4a97b27435c9370acc57d2fd485c4 100644 (file)
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -142,6 +142,7 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
 };
 
 static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
+       DEF_MOD("3dge",           0,    R8A779A0_CLK_ZG),
        DEF_MOD("isp0",          16,    R8A779A0_CLK_S1D1),
        DEF_MOD("isp1",          17,    R8A779A0_CLK_S1D1),
        DEF_MOD("isp2",          18,    R8A779A0_CLK_S1D1),