*/
#include <dt-bindings/iio/adc/ingenic,adc.h>
+
+#include <linux/cleanup.h>
#include <linux/clk.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
{
struct ingenic_adc *adc = iio_priv(iio_dev);
- mutex_lock(&adc->lock);
+ guard(mutex)(&adc->lock);
/* Init ADCMD */
readl(adc->base + JZ_ADC_REG_ADCMD);
/* We're done */
writel(0, adc->base + JZ_ADC_REG_ADCMD);
-
- mutex_unlock(&adc->lock);
}
static void ingenic_adc_set_config(struct ingenic_adc *adc,
{
uint32_t cfg;
- mutex_lock(&adc->lock);
+ guard(mutex)(&adc->lock);
cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
cfg |= val;
writel(cfg, adc->base + JZ_ADC_REG_CFG);
-
- mutex_unlock(&adc->lock);
}
static void __ingenic_adc_enable(struct ingenic_adc *adc, int engine,
int engine,
bool enabled)
{
- mutex_lock(&adc->lock);
+ guard(mutex)(&adc->lock);
__ingenic_adc_enable(adc, engine, enabled);
- mutex_unlock(&adc->lock);
}
static int ingenic_adc_capture(struct ingenic_adc *adc,
* probably due to the switch of VREF. We must keep the lock here to
* avoid races with the buffer enable/disable functions.
*/
- mutex_lock(&adc->lock);
+ guard(mutex)(&adc->lock);
cfg = readl(adc->base + JZ_ADC_REG_CFG);
writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
__ingenic_adc_enable(adc, engine, false);
writel(cfg, adc->base + JZ_ADC_REG_CFG);
- mutex_unlock(&adc->lock);
return ret;
}
}
/* We cannot sample the aux channels in parallel. */
- mutex_lock(&adc->aux_lock);
- ret = __ingenic_adc_read_chan(adc, chan, val);
- mutex_unlock(&adc->aux_lock);
+ scoped_guard(mutex, &adc->aux_lock)
+ ret = __ingenic_adc_read_chan(adc, chan, val);
clk_disable(adc->clk);