drm/msm/disp: pull in common tiled YUV format parameters

Pull common params of tiled YUV formats into corresponding macro
definitions, simplifying format table.

Patchwork: https://patchwork.freedesktop.org/patch/688174/
Link: https://lore.kernel.org/r/20251114-dpu-formats-v3-7-cae312379d49@oss.qualcomm.com
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # qcm6490-fairphone-fp5
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/disp/mdp_format.c b/drivers/gpu/drm/msm/disp/mdp_format.c
index 900b2de252a6eb2eac3d0670f1aaa77f7520fd77..5a1efbd99beeaf454f726e2824cb26d2bf31cf22 100644 (file)
--- a/drivers/gpu/drm/msm/disp/mdp_format.c
+++ b/drivers/gpu/drm/msm/disp/mdp_format.c
@@ -284,8 +284,7 @@ static struct csc_cfg csc_convert[CSC_MAX] = {
        .tile_height = MDP_TILE_HEIGHT_DEFAULT                            \
 }
 
-#define PSEUDO_YUV_FMT_TILED(fmt, a, r, g, b, e0, e1, chroma,             \
-flg, fm, np, th)                                                          \
+#define PSEUDO_YUV_FMT_TILED(fmt, r, g, b, e0, e1, chroma, flg, th)       \
 {                                                                         \
        .pixel_format = DRM_FORMAT_ ## fmt,                               \
        .fetch_type = MDP_PLANE_PSEUDO_PLANAR,                            \
@@ -294,13 +293,15 @@ flg, fm, np, th)                                                          \
        .bpc_g_y = g,                                                     \
        .bpc_b_cb = b,                                                    \
        .bpc_r_cr = r,                                                    \
-       .bpc_a = a,                                                       \
+       .bpc_a = 0,                                                       \
        .chroma_sample = chroma,                                          \
        .unpack_count = 2,                                                \
        .bpp = 2,                                                         \
-       .fetch_mode = fm,                                                 \
-       .flags = MSM_FORMAT_FLAG_UNPACK_TIGHT | flg,                      \
-       .num_planes = np,                                                 \
+       .fetch_mode = MDP_FETCH_UBWC,                                     \
+       .flags = MSM_FORMAT_FLAG_UNPACK_TIGHT |                           \
+                MSM_FORMAT_FLAG_YUV |                                    \
+                MSM_FORMAT_FLAG_COMPRESSED | flg,                        \
+       .num_planes = 4,                                                  \
        .tile_height = th                                                 \
 }
 
@@ -623,19 +624,16 @@ static const struct msm_format mdp_formats_ubwc[] = {
                C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
 
        PSEUDO_YUV_FMT_TILED(NV12,
-               0, BPC8, BPC8, BPC8,
+               BPC8, BPC8, BPC8,
                C1_B_Cb, C2_R_Cr,
-               CHROMA_420, MSM_FORMAT_FLAG_YUV |
-                               MSM_FORMAT_FLAG_COMPRESSED,
-               MDP_FETCH_UBWC, 4, MDP_TILE_HEIGHT_NV12),
+               CHROMA_420, 0,
+               MDP_TILE_HEIGHT_NV12),
 
        PSEUDO_YUV_FMT_TILED(P010,
-               0, BPC8, BPC8, BPC8,
+               BPC8, BPC8, BPC8,
                C1_B_Cb, C2_R_Cr,
-               CHROMA_420, MSM_FORMAT_FLAG_DX |
-                               MSM_FORMAT_FLAG_YUV |
-                               MSM_FORMAT_FLAG_COMPRESSED,
-               MDP_FETCH_UBWC, 4, MDP_TILE_HEIGHT_UBWC),
+               CHROMA_420, MSM_FORMAT_FLAG_DX,
+               MDP_TILE_HEIGHT_UBWC),
 };
 
 const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format,