target/119010 - reservations for Zen4/Zen5 movhlps to memory

The following adds missing reservations for the store variant of
sselog reservations covering

;;     112--> b  0: i1499 [dx-0x10]=vec_select(xmm10,parallel)    :nothing

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_log_evex_store,
	znver5_sse_log_evex_store): New reservations.

diff --git a/gcc/config/i386/zn4zn5.md b/gcc/config/i386/zn4zn5.md
index 6720fda17056c9978695f40b86f8faae91846135..1ac1d07c04b8898f85b61e88bc2a4e518180d048 100644 (file)
--- a/gcc/config/i386/zn4zn5.md
+++ b/gcc/config/i386/zn4zn5.md
@@ -1367,6 +1367,20 @@
                                    (eq_attr "memory" "load"))))
                         "znver4-direct,znver5-load,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3")
 
+(define_insn_reservation "znver4_sse_log_evex_store" 1
+                        (and (eq_attr "cpu" "znver4")
+                             (and (eq_attr "type" "sselog")
+                                  (and (eq_attr "mode" "V16SF,V8DF,XI")
+                                   (eq_attr "memory" "store"))))
+                        "znver4-direct,znver4-store,znver4-fpu0*2|znver4-fpu1*2|znver4-fpu2*2|znver4-fpu3*2")
+
+(define_insn_reservation "znver5_sse_log_evex_store" 1
+                        (and (eq_attr "cpu" "znver5")
+                             (and (eq_attr "type" "sselog")
+                                  (and (eq_attr "mode" "V16SF,V8DF,XI")
+                                   (eq_attr "memory" "store"))))
+                        "znver4-direct,znver5-store,znver4-fpu0|znver4-fpu1|znver4-fpu2|znver4-fpu3")
+
 (define_insn_reservation "znver4_sse_log1_evex" 1
                         (and (eq_attr "cpu" "znver4")
                              (and (eq_attr "type" "sselog1")