(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8)))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
- || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
- || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
+ && h8300_regs_ok_for_stm (2, operands)"
"stm.l\\t%S0-%S1,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8)))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
- || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
- || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
+ && h8300_regs_ok_for_stm (2, operands)"
"stm.l\\t%S0-%S1,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
[(match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")]
"TARGET_H8300S
- && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
- || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
- || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
+ && h8300_regs_ok_for_stm (2, operands)"
"
{
if (!TARGET_NORMAL_MODE)
(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12)))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2)
- || (REGNO (operands[0]) == 4
- && REGNO (operands[1]) == 5
- && REGNO (operands[2]) == 6))"
+ && h8300_regs_ok_for_stm (3, operands)"
"stm.l\\t%S0-%S2,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12)))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2)
- || (REGNO (operands[0]) == 4
- && REGNO (operands[1]) == 5
- && REGNO (operands[2]) == 6))"
+ && h8300_regs_ok_for_stm (3, operands)"
"stm.l\\t%S0-%S2,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")]
"TARGET_H8300S
- && ((REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2)
- || (REGNO (operands[0]) == 4
- && REGNO (operands[1]) == 5
- && REGNO (operands[2]) == 6))"
+ && h8300_regs_ok_for_stm (3, operands)"
"
{
if (!TARGET_NORMAL_MODE)
(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -16)))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2
- && REGNO (operands[3]) == 3"
+ && h8300_regs_ok_for_stm (4, operands)"
"stm.l\\t%S0-%S3,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -16)))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
- && REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2
- && REGNO (operands[3]) == 3"
+ && h8300_regs_ok_for_stm (4, operands)"
"stm.l\\t%S0-%S3,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "register_operand" "")]
"TARGET_H8300S
- && REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2
- && REGNO (operands[3]) == 3"
+ && h8300_regs_ok_for_stm (4, operands)"
"
{
if (!TARGET_NORMAL_MODE)
(set (mem:SI (reg:SI SP_REG))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
- || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
- || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
+ && h8300_regs_ok_for_stm (2, operands)"
"ldm.l\\t@er7+,%S0-%S1"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(set (mem:SI (reg:HI SP_REG))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
- || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
- || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
+ && h8300_regs_ok_for_stm (2, operands)"
"ldm.l\\t@er7+,%S0-%S1"
[(set_attr "cc" "none")
(set_attr "length" "4")])
[(match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")]
"TARGET_H8300S
- && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
- || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
- || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
+ && h8300_regs_ok_for_stm (2, operands)"
"
{
if (!TARGET_NORMAL_MODE)
(set (mem:SI (reg:SI SP_REG))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2)
- || (REGNO (operands[0]) == 4
- && REGNO (operands[1]) == 5
- && REGNO (operands[2]) == 6))"
+ && h8300_regs_ok_for_stm (3, operands)"
"ldm.l\\t@er7+,%S0-%S2"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(set (mem:SI (reg:HI SP_REG))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
- && ((REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2)
- || (REGNO (operands[0]) == 4
- && REGNO (operands[1]) == 5
- && REGNO (operands[2]) == 6))"
+ && h8300_regs_ok_for_stm (3, operands)"
"ldm.l\\t@er7+,%S0-%S2"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")]
"TARGET_H8300S
- && ((REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2)
- || (REGNO (operands[0]) == 4
- && REGNO (operands[1]) == 5
- && REGNO (operands[2]) == 6))"
+ && h8300_regs_ok_for_stm (3, operands)"
"
{
if (!TARGET_NORMAL_MODE)
(set (mem:SI (reg:SI SP_REG))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2
- && REGNO (operands[3]) == 3"
+ && h8300_regs_ok_for_stm (4, operands)"
"ldm.l\\t@er7+,%S0-%S3"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(set (mem:SI (reg:HI SP_REG))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2
- && REGNO (operands[3]) == 3"
+ && h8300_regs_ok_for_stm (4, operands)"
"ldm.l\\t@er7+,%S0-%S3"
[(set_attr "cc" "none")
(set_attr "length" "4")])
(match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "register_operand" "")]
"TARGET_H8300S && !TARGET_NORMAL_MODE
- && REGNO (operands[0]) == 0
- && REGNO (operands[1]) == 1
- && REGNO (operands[2]) == 2
- && REGNO (operands[3]) == 3"
+ && h8300_regs_ok_for_stm (4, operands)"
"
{
if (!TARGET_NORMAL_MODE)