re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3 -ffloat-store...

	PR target/46098
	* config/i386/i386.c (ix86_expand_special_args_builtin): Always
	generate target register for "load" class builtins.

	Revert:
	2010-10-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/46098
	* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
	Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
	(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
	(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
	(<sse>_movu<ssemodesuffix>): New expander.
	(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
	(avx_movdqu<avxmodesuffix>): New expander.
	(*sse2_movdqu): Rename from sse2_movdqu.
	(sse2_movdqu): New expander.

testsuite/ChangeLog:

	* gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
	* gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.

From-SVN: r187483

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b97a5dea3be387268e86b59506cab6706ae1f8ba..4563e0aa44ba7b103bd5b5c033c1fae2245fb8b3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,23 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/i386.c (ix86_expand_special_args_builtin): Always
+       generate target register for "load" class builtins.
+
+       Revert:
+       2010-10-22  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
+       Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
+       (avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
+       (*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
+       (<sse>_movu<ssemodesuffix>): New expander.
+       (*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
+       (avx_movdqu<avxmodesuffix>): New expander.
+       (*sse2_movdqu): Rename from sse2_movdqu.
+       (sse2_movdqu): New expander.
+
 2012-05-13  Uros Bizjak  <ubizjak@gmail.com>
 
        Backport from mainline

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8c27488ebf93f9eb3971ffcdd3413a321c6bd4b3..9e2d66cd9cac9587a4519bc0dc8b9bb9a8491d17 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -27230,8 +27230,8 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
       arg_adjust = 0;
       if (optimize
          || target == 0
-         || GET_MODE (target) != tmode
-         || !insn_p->operand[0].predicate (target, tmode))
+         || !register_operand (target, tmode)
+         || GET_MODE (target) != tmode)
        target = gen_reg_rtx (tmode);
     }
 

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index ba997c22436d6ec17b9e81c97f60bba0f913267b..b0dc3d8db80893f0a0dcbbc816d298d58a78affb 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -392,18 +392,7 @@
   DONE;
 })
 
-(define_expand "avx_movu<ssemodesuffix><avxmodesuffix>"
-  [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "")
-       (unspec:AVXMODEF2P
-         [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*avx_movu<ssemodesuffix><avxmodesuffix>"
+(define_insn "avx_movu<ssemodesuffix><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "=x,m")
        (unspec:AVXMODEF2P
          [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm,x")]
@@ -429,18 +418,7 @@
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
 
-(define_expand "<sse>_movu<ssemodesuffix>"
-  [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "")
-       (unspec:SSEMODEF2P
-         [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*<sse>_movu<ssemodesuffix>"
+(define_insn "<sse>_movu<ssemodesuffix>"
   [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m")
        (unspec:SSEMODEF2P
          [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm,x")]
@@ -452,18 +430,7 @@
    (set_attr "movu" "1")
    (set_attr "mode" "<MODE>")])
 
-(define_expand "avx_movdqu<avxmodesuffix>"
-  [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "")
-       (unspec:AVXMODEQI
-         [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "TARGET_AVX"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*avx_movdqu<avxmodesuffix>"
+(define_insn "avx_movdqu<avxmodesuffix>"
   [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "=x,m")
        (unspec:AVXMODEQI
          [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")]
@@ -475,17 +442,7 @@
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
 
-(define_expand "sse2_movdqu"
-  [(set (match_operand:V16QI 0 "nonimmediate_operand" "")
-       (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "")]
-                     UNSPEC_MOVU))]
-  "TARGET_SSE2"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (V16QImode, operands[1]);
-})
-
-(define_insn "*sse2_movdqu"
+(define_insn "sse2_movdqu"
   [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
        (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")]
                      UNSPEC_MOVU))]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 984a01134c33a0f7af2b3fb04191a36067615ebf..327205980e6abade015ab6da207fef2c238e46f7 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
+       * gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.
+
 2012-05-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
        Backport from mainline

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
index 023e859b6c1dd21fbb3f4488cca171d889e8a11f..c1c7517d71133557910a6c5018508c49709e27cd 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movups256/1" } } */
-/* { dg-final { scan-assembler "\\*avx_movups/1" } } */
+/* { dg-final { scan-assembler-not "avx_movups256/1" } } */
+/* { dg-final { scan-assembler "avx_movups/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
index 8394e27197b260bd5a17c16600ab8fea47cdbb75..319cf5e0a018d29cf80f36ec6ce8f8146c7cf7ff 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
@@ -24,6 +24,6 @@ avx_test (void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movdqu256/1" } } */
-/* { dg-final { scan-assembler "\\*avx_movdqu/1" } } */
+/* { dg-final { scan-assembler-not "avx_movdqu256/1" } } */
+/* { dg-final { scan-assembler "avx_movdqu/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
index ec7d59d53ccee2cd650ccbea3922731d62002fde..6ac579aa77c9cdc5fa61340885497d71303863be 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movupd256/1" } } */
-/* { dg-final { scan-assembler "\\*avx_movupd/1" } } */
+/* { dg-final { scan-assembler-not "avx_movupd256/1" } } */
+/* { dg-final { scan-assembler "avx_movupd/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
index 0d3ef33312069b39499fc1e6e9c3d09a7504e925..7c015a8b90a70497f4c099d4f72dec29b6e99a3e 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
@@ -14,6 +14,6 @@ avx_test (void)
     b[i] = a[i+3] * 2;
 }
 
-/* { dg-final { scan-assembler "\\*avx_movups256/1" } } */
-/* { dg-final { scan-assembler-not "\\*avx_movups/1" } } */
+/* { dg-final { scan-assembler "avx_movups256/1" } } */
+/* { dg-final { scan-assembler-not "avx_movups/1" } } */
 /* { dg-final { scan-assembler-not "vinsertf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
index 99db55c9d0add311851722e2ab7e4e787606d5a2..cf1944acab2c06d52bd04be5d9724037f0385963 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
@@ -17,6 +17,6 @@ avx_test (void)
     d[i] = c[i] * 20.0;
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movups256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movups256/2" } } */
 /* { dg-final { scan-assembler "movups.*\\*avx_movv4sf_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
index 38ee9e2a45c5a11e4187213b16b35370a0f4fa65..5a10ec3a7fbaa129094707973f3c804d1d574cd1 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
@@ -24,6 +24,6 @@ avx_test (void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movdqu256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movdqu256/2" } } */
 /* { dg-final { scan-assembler "movdqu.*\\*avx_movv16qi_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
index eaab6fd775b94b980ee5c528d922ba8634d988a9..daea7b0ea8138a6b088a8b3fbbc260fe7627a323 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
@@ -17,6 +17,6 @@ avx_test (void)
     d[i] = c[i] * 20.0;
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movupd256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movupd256/2" } } */
 /* { dg-final { scan-assembler "movupd.*\\*avx_movv2df_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
index 96cca66ae9c7afdb6b3f6e54cc54e360896169f6..39b6f3bef16935428735e4089a2643b9f3e85673 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
@@ -14,7 +14,7 @@ avx_test (void)
     b[i+3] = a[i] * c[i];
 }
 
-/* { dg-final { scan-assembler "\\*avx_movups256/2" } } */
-/* { dg-final { scan-assembler-not "\\*avx_movups/2" } } */
+/* { dg-final { scan-assembler "avx_movups256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movups/2" } } */
 /* { dg-final { scan-assembler-not "\\*avx_movv4sf_internal/3" } } */
 /* { dg-final { scan-assembler-not "vextractf128" } } */