drm/amd/ras: adapt sync info func for pmfw eeprom

adapt sync info func for pmfw eeprom

Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_core.c b/drivers/gpu/drm/amd/ras/rascore/ras_core.c
index 36d9bb8ca9e45ea6a8d51fa2f374bf51b621bc0e..bbf13c076a94b26c9662d4e2b9f5e7d2d4b9f7ae 100644 (file)
--- a/drivers/gpu/drm/amd/ras/rascore/ras_core.c
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_core.c
@@ -258,7 +258,10 @@ static int ras_core_eeprom_recovery(struct ras_core_context *ras_core)
                return ret;
        }
 
-       ras_eeprom_sync_info(ras_core);
+       if (ras_fw_eeprom_supported(ras_core))
+               ras_fw_eeprom_sync_info(ras_core);
+       else
+               ras_eeprom_sync_info(ras_core);
 
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
index 70bbf1334c4f7550f839c94c81772bd7aaab8680..29001e606d1bc3057fed28250f6a6d534160d8e3 100644 (file)
--- a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.c
@@ -504,3 +504,17 @@ enum ras_gpu_health_status
 
        return RAS_GPU_HEALTH_USABLE;
 }
+
+void ras_fw_eeprom_sync_info(struct ras_core_context *ras_core)
+{
+       struct ras_fw_eeprom_control *control;
+
+       if (!ras_core)
+               return;
+
+       control = &ras_core->ras_fw_eeprom;
+       ras_core_event_notify(ras_core, RAS_EVENT_ID__UPDATE_BAD_PAGE_NUM,
+               &control->ras_num_recs);
+       ras_core_event_notify(ras_core, RAS_EVENT_ID__UPDATE_BAD_CHANNEL_BITMAP,
+               &control->bad_channel_bitmap);
+}

diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
index 75d8b95c6923d558a02903b0ca9109d659b66078..762345be075c2f81676c9873245e96c5438bf08d 100644 (file)
--- a/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
+++ b/drivers/gpu/drm/amd/ras/rascore/ras_eeprom_fw.h
@@ -82,5 +82,6 @@ int ras_fw_eeprom_hw_fini(struct ras_core_context *ras_core);
 int ras_fw_eeprom_check_storage_status(struct ras_core_context *ras_core);
 enum ras_gpu_health_status
        ras_fw_eeprom_check_gpu_status(struct ras_core_context *ras_core);
+void ras_fw_eeprom_sync_info(struct ras_core_context *ras_core);
 
 #endif