testsuite/i386: Add vector sat_sub testcases [PR112600]

	PR middle-end/112600

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr112600-4a.c: New test.
	* gcc.target/i386/pr112600-4b.c: New test.

diff --git a/gcc/testsuite/gcc.target/i386/pr112600-4a.c b/gcc/testsuite/gcc.target/i386/pr112600-4a.c
new file mode 100644 (file)
index 0000000..89c5ea6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr112600-4a.c
@@ -0,0 +1,25 @@
+/* PR middle-end/112600 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -msse2" } */
+
+#define MIN -128
+#define MAX 127
+
+typedef char T;
+typedef unsigned char UT;
+
+void foo (T *out, T *op_1, T *op_2, int n)
+{
+  int i;
+
+  for (i = 0; i < n; i++)
+    {
+      T x = op_1[i];
+      T y = op_2[i];
+      T dif = (UT) x - (UT) y;
+
+      out[i] = (x ^ y) >= 0 ? dif : (dif ^ x) >= 0 ? dif : x < 0 ? MIN : MAX;
+    }
+}
+
+/* { dg-final { scan-assembler "psubsb" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr112600-4b.c b/gcc/testsuite/gcc.target/i386/pr112600-4b.c
new file mode 100644 (file)
index 0000000..0864484
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr112600-4b.c
@@ -0,0 +1,25 @@
+/* PR middle-end/112600 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -msse2" } */
+
+#define MIN -32768
+#define MAX 32767
+
+typedef short T;
+typedef unsigned short UT;
+
+void foo (T *out, T *op_1, T *op_2, int n)
+{
+  int i;
+
+  for (i = 0; i < n; i++)
+    {
+      T x = op_1[i];
+      T y = op_2[i];
+      T dif = (UT) x - (UT) y;
+
+      out[i] = (x ^ y) >= 0 ? dif : (dif ^ x) >= 0 ? dif : x < 0 ? MIN : MAX;
+    }
+}
+
+/* { dg-final { scan-assembler "psubsw" } } */