delta++;
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr64)d64 != (Addr64)guest_RIP_bbstart
&& jmpDelta < 0
&& resteerOkFn( callback_opaque, d64) ) {
/* Speculation: assume this backward branch is taken. So we
need to emit a side-exit to the insn following this one,
on the negation of the condition, and continue at the
- branch target address (d64). */
+ branch target address (d64). If we wind up back at the
+ first instruction of the trace, just stop; it's better to
+ let the IR loop unroller handle that case. */
stmt( IRStmt_Exit(
mk_amd64g_calculate_condition(
(AMD64Condcode)(1 ^ (opc - 0x70))),
else
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr64)d64 != (Addr64)guest_RIP_bbstart
&& jmpDelta >= 0
&& resteerOkFn( callback_opaque, guest_RIP_bbstart+delta ) ) {
/* Speculation: assume this forward branch is not taken. So
delta += 4;
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr64)d64 != (Addr64)guest_RIP_bbstart
&& jmpDelta < 0
&& resteerOkFn( callback_opaque, d64) ) {
/* Speculation: assume this backward branch is taken. So
we need to emit a side-exit to the insn following this
one, on the negation of the condition, and continue at
- the branch target address (d64). */
+ the branch target address (d64). If we wind up back at
+ the first instruction of the trace, just stop; it's
+ better to let the IR loop unroller handle that case. */
stmt( IRStmt_Exit(
mk_amd64g_calculate_condition(
(AMD64Condcode)(1 ^ (opc - 0x80))),
else
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr64)d64 != (Addr64)guest_RIP_bbstart
&& jmpDelta >= 0
&& resteerOkFn( callback_opaque, guest_RIP_bbstart+delta ) ) {
/* Speculation: assume this forward branch is not taken.
continue disassembling at the insn immediately
following this one. */
stmt( IRStmt_Exit(
- mk_amd64g_calculate_condition((AMD64Condcode)(opc - 0x80)),
+ mk_amd64g_calculate_condition((AMD64Condcode)
+ (opc - 0x80)),
Ijk_Boring,
IRConst_U64(d64) ) );
dres.whatNext = Dis_ResteerC;
delta++;
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta < 0
&& resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) {
/* Speculation: assume this backward branch is taken. So we
need to emit a side-exit to the insn following this one,
on the negation of the condition, and continue at the
- branch target address (d32). */
+ branch target address (d32). If we wind up back at the
+ first instruction of the trace, just stop; it's better to
+ let the IR loop unroller handle that case. */
stmt( IRStmt_Exit(
mk_x86g_calculate_condition((X86Condcode)(1 ^ (opc - 0x70))),
Ijk_Boring,
else
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta >= 0
&& resteerOkFn( callback_opaque,
(Addr64)(Addr32)(guest_EIP_bbstart+delta)) ) {
delta += 4;
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta < 0
&& resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) {
/* Speculation: assume this backward branch is taken. So
we need to emit a side-exit to the insn following this
one, on the negation of the condition, and continue at
- the branch target address (d32). */
+ the branch target address (d32). If we wind up back at
+ the first instruction of the trace, just stop; it's
+ better to let the IR loop unroller handle that case.*/
stmt( IRStmt_Exit(
- mk_x86g_calculate_condition((X86Condcode)(1 ^ (opc - 0x80))),
+ mk_x86g_calculate_condition((X86Condcode)
+ (1 ^ (opc - 0x80))),
Ijk_Boring,
IRConst_U32(guest_EIP_bbstart+delta) ) );
dres.whatNext = Dis_ResteerC;
else
if (resteerCisOk
&& vex_control.guest_chase_cond
+ && (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta >= 0
&& resteerOkFn( callback_opaque,
(Addr64)(Addr32)(guest_EIP_bbstart+delta)) ) {