pa.c (pa_emit_move_sequence): Handle floating point reloads for other unsupported...

	* config/pa/pa.c (pa_emit_move_sequence): Handle floating point
	reloads for other unsupported memory operands.

From-SVN: r232255

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 319015c23bb6f5960742377487831c0525e6dc67..9d1a4418122022c9f8693638962c609f30429738 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-11  John David Anglin  <danglin@gcc.gnu.org>
+
+       * config/pa/pa.c (pa_emit_move_sequence): Handle floating point
+       reloads for other unsupported memory operands.
+
 2016-01-11  Martin Jambor  <mjambor@suse.cz>
 
        PR ipa/66616

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 47e473b0d59d97d43f84e547d796c88209e22ef2..aeafd44f6c8957883994b91a2b7f0eb1698da14a 100644 (file)
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -1663,7 +1663,8 @@ pa_emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
 
   /* Handle secondary reloads for loads/stores of FP registers from
      REG+D addresses where D does not fit in 5 or 14 bits, including
-     (subreg (mem (addr))) cases.  */
+     (subreg (mem (addr))) cases, and reloads for other unsupported
+     memory operands.  */
   if (scratch_reg
       && FP_REG_P (operand0)
       && (MEM_P (operand1)
@@ -1675,30 +1676,43 @@ pa_emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
       if (GET_CODE (op1) == SUBREG)
        op1 = XEXP (op1, 0);
 
-      if (reg_plus_base_memory_operand (op1, GET_MODE (op1))
-         && !(TARGET_PA_20
-              && !TARGET_ELF32
-              && INT_14_BITS (XEXP (XEXP (op1, 0), 1)))
-         && !INT_5_BITS (XEXP (XEXP (op1, 0), 1)))
+      if (reg_plus_base_memory_operand (op1, GET_MODE (op1)))
        {
-         /* SCRATCH_REG will hold an address and maybe the actual data.
-            We want it in WORD_MODE regardless of what mode it was
-            originally given to us.  */
-         scratch_reg = force_mode (word_mode, scratch_reg);
-
-         /* D might not fit in 14 bits either; for such cases load D into
-            scratch reg.  */
-         if (!INT_14_BITS (XEXP (XEXP (op1, 0), 1)))
+         if (!(TARGET_PA_20
+               && !TARGET_ELF32
+               && INT_14_BITS (XEXP (XEXP (op1, 0), 1)))
+             && !INT_5_BITS (XEXP (XEXP (op1, 0), 1)))
            {
-             emit_move_insn (scratch_reg, XEXP (XEXP (op1, 0), 1));
-             emit_move_insn (scratch_reg,
-                             gen_rtx_fmt_ee (GET_CODE (XEXP (op1, 0)),
-                                             Pmode,
-                                             XEXP (XEXP (op1, 0), 0),
-                                             scratch_reg));
+             /* SCRATCH_REG will hold an address and maybe the actual data.
+                We want it in WORD_MODE regardless of what mode it was
+                originally given to us.  */
+             scratch_reg = force_mode (word_mode, scratch_reg);
+
+             /* D might not fit in 14 bits either; for such cases load D
+                into scratch reg.  */
+             if (!INT_14_BITS (XEXP (XEXP (op1, 0), 1)))
+               {
+                 emit_move_insn (scratch_reg, XEXP (XEXP (op1, 0), 1));
+                 emit_move_insn (scratch_reg,
+                                 gen_rtx_fmt_ee (GET_CODE (XEXP (op1, 0)),
+                                                 Pmode,
+                                                 XEXP (XEXP (op1, 0), 0),
+                                                 scratch_reg));
+               }
+             else
+               emit_move_insn (scratch_reg, XEXP (op1, 0));
+             emit_insn (gen_rtx_SET (VOIDmode, operand0,
+                                 replace_equiv_address (op1, scratch_reg)));
+             return 1;
            }
-         else
-           emit_move_insn (scratch_reg, XEXP (op1, 0));
+       }
+      else if ((!INT14_OK_STRICT && symbolic_memory_operand (op1, VOIDmode))
+              || IS_LO_SUM_DLT_ADDR_P (XEXP (op1, 0))
+              || IS_INDEX_ADDR_P (XEXP (op1, 0)))
+       {
+         /* Load memory address into SCRATCH_REG.  */
+         scratch_reg = force_mode (word_mode, scratch_reg);
+         emit_move_insn (scratch_reg, XEXP (op1, 0));
          emit_insn (gen_rtx_SET (VOIDmode, operand0,
                                  replace_equiv_address (op1, scratch_reg)));
          return 1;
@@ -1715,30 +1729,43 @@ pa_emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
       if (GET_CODE (op0) == SUBREG)
        op0 = XEXP (op0, 0);
 
-      if (reg_plus_base_memory_operand (op0, GET_MODE (op0))
-         && !(TARGET_PA_20
-              && !TARGET_ELF32
-              && INT_14_BITS (XEXP (XEXP (op0, 0), 1)))
-         && !INT_5_BITS (XEXP (XEXP (op0, 0), 1)))
+      if (reg_plus_base_memory_operand (op0, GET_MODE (op0)))
        {
-         /* SCRATCH_REG will hold an address and maybe the actual data.
-            We want it in WORD_MODE regardless of what mode it was
-            originally given to us.  */
-         scratch_reg = force_mode (word_mode, scratch_reg);
-
-         /* D might not fit in 14 bits either; for such cases load D into
-            scratch reg.  */
-         if (!INT_14_BITS (XEXP (XEXP (op0, 0), 1)))
+         if (!(TARGET_PA_20
+               && !TARGET_ELF32
+               && INT_14_BITS (XEXP (XEXP (op0, 0), 1)))
+             && !INT_5_BITS (XEXP (XEXP (op0, 0), 1)))
            {
-             emit_move_insn (scratch_reg, XEXP (XEXP (op0, 0), 1));
-             emit_move_insn (scratch_reg,
-                             gen_rtx_fmt_ee (GET_CODE (XEXP (op0, 0)),
-                                             Pmode,
-                                             XEXP (XEXP (op0, 0), 0),
-                                             scratch_reg));
+             /* SCRATCH_REG will hold an address and maybe the actual data.
+                We want it in WORD_MODE regardless of what mode it was
+                originally given to us.  */
+             scratch_reg = force_mode (word_mode, scratch_reg);
+
+             /* D might not fit in 14 bits either; for such cases load D
+                into scratch reg.  */
+             if (!INT_14_BITS (XEXP (XEXP (op0, 0), 1)))
+               {
+                 emit_move_insn (scratch_reg, XEXP (XEXP (op0, 0), 1));
+                 emit_move_insn (scratch_reg,
+                                 gen_rtx_fmt_ee (GET_CODE (XEXP (op0, 0)),
+                                                 Pmode,
+                                                 XEXP (XEXP (op0, 0), 0),
+                                                 scratch_reg));
+               }
+             else
+               emit_move_insn (scratch_reg, XEXP (op0, 0));
+             emit_insn (gen_rtx_SET (VOIDmode,
+                                     replace_equiv_address (op0, scratch_reg),
+                                     operand1));
+             return 1;
            }
-         else
-           emit_move_insn (scratch_reg, XEXP (op0, 0));
+       }
+      else if ((!INT14_OK_STRICT && symbolic_memory_operand (op0, VOIDmode))
+              || IS_LO_SUM_DLT_ADDR_P (XEXP (op0, 0))
+              || IS_INDEX_ADDR_P (XEXP (op0, 0)))
+       {
+         /* Load memory address into SCRATCH_REG.  */
+         emit_move_insn (scratch_reg, XEXP (op0, 0));
          emit_insn (gen_rtx_SET (VOIDmode,
                                  replace_equiv_address (op0, scratch_reg),
                                  operand1));