]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
iommu/amd: Re-enable IOMMU event log interrupt after handling.
authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Wed, 27 Mar 2013 23:51:52 +0000 (18:51 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 7 Jun 2013 19:53:23 +0000 (12:53 -0700)
commit 925fe08bce38d1ff052fe2209b9e2b8d5fbb7f98 upstream.

Current driver does not clear the IOMMU event log interrupt bit
in the IOMMU status register after processing an interrupt.
This causes the IOMMU hardware to generate event log interrupt only once.
This has been observed in both IOMMU v1 and V2 hardware.
This patch clears the bit by writing 1 to bit 1 of the IOMMU
status register (MMIO Offset 2020h)

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/iommu/amd_iommu.c
drivers/iommu/amd_iommu_types.h

index cbb164581e7d3b0e4ecf4903a7be07002166828c..176248e74f4254d03c33ddbcaf0b06786f90fc5f 100644 (file)
@@ -703,6 +703,9 @@ static void iommu_poll_events(struct amd_iommu *iommu)
        u32 head, tail;
        unsigned long flags;
 
+       /* enable event interrupts again */
+       writel(MMIO_STATUS_EVT_INT_MASK, iommu->mmio_base + MMIO_STATUS_OFFSET);
+
        spin_lock_irqsave(&iommu->lock, flags);
 
        head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
index e38ab438bb342e241c1b5e545a0b01a4e4ea5017..083f98c0488b676849e64eaa1006a14b4bab6406 100644 (file)
@@ -99,6 +99,7 @@
 #define PASID_MASK             0x000fffff
 
 /* MMIO status bits */
+#define MMIO_STATUS_EVT_INT_MASK       (1 << 1)
 #define MMIO_STATUS_COM_WAIT_INT_MASK  (1 << 2)
 #define MMIO_STATUS_PPR_INT_MASK       (1 << 6)