hwmon: (lm63) Mask PWM frequency multiplier to supported bits

Sashiko is concerned that reading a PWM frequency multiplier outside
the supported range of [1, 31] might result in bad PWM values written
to the chip. Technically, the chip should never return a value with
the upper 3 bits set, so this should never happen. However, it is
unknown if there are LM63 variants where the upper bits of the register
can be written.

Mask the register value read from the chip to only accept the lower 5 bit
when reading it from the chip to avoid the problem.

Reported-by: Sashiko <sashiko-bot@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>

diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c
index e2a429e579ac1b2afa8c7cdbc2cc30e0b6d21d91..da09770c05e7c379ffcb9a3c128e614283912174 100644 (file)
--- a/drivers/hwmon/lm63.c
+++ b/drivers/hwmon/lm63.c
@@ -247,8 +247,7 @@ static struct lm63_data *lm63_update_device(struct device *dev)
                                        LM63_REG_TACH_LIMIT_MSB) << 8);
                }
 
-               data->pwm1_freq = i2c_smbus_read_byte_data(client,
-                                 LM63_REG_PWM_FREQ);
+               data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ) & 0x1f;
                if (data->pwm1_freq == 0)
                        data->pwm1_freq = 1;
                data->pwm1[0] = i2c_smbus_read_byte_data(client,
@@ -1187,7 +1186,7 @@ static void lm63_init_client(struct lm63_data *data)
                data->config |= 0x04;
 
        /* We may need pwm1_freq before ever updating the client data */
-       data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ);
+       data->pwm1_freq = i2c_smbus_read_byte_data(client, LM63_REG_PWM_FREQ) & 0x1f;
        if (data->pwm1_freq == 0)
                data->pwm1_freq = 1;