arm64: dts: qcom: ipq5424: Add tsens node

IPQ5424 has tsens v2.3.3 peripheral. This patch adds the tsens
node with nvmem cells for calibration data.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Link: https://lore.kernel.org/r/20250210120436.821684-6-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index 7034d378b1ef5a447d940eeceaae4e707833d599..774386d785d585c21370b0fde73ff94255e940cf 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -152,6 +152,93 @@
                #size-cells = <2>;
                ranges = <0 0 0 0 0x10 0>;
 
+               efuse@a4000 {
+                       compatible = "qcom,ipq5424-qfprom", "qcom,qfprom";
+                       reg = <0 0x000a4000 0 0x741>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       tsens_sens9_off: s9@3dc {
+                               reg = <0x3dc 0x1>;
+                               bits = <4 4>;
+                       };
+
+                       tsens_sens10_off: s10@3dd {
+                               reg = <0x3dd 0x1>;
+                               bits = <0 4>;
+                       };
+
+                       tsens_sens11_off: s11@3dd {
+                               reg = <0x3dd 0x1>;
+                               bits = <4 4>;
+                       };
+
+                       tsens_sens12_off: s12@3de {
+                               reg = <0x3de 0x1>;
+                               bits = <0 4>;
+                       };
+
+                       tsens_sens13_off: s13@3de {
+                               reg = <0x3de 0x1>;
+                               bits = <4 4>;
+                       };
+
+                       tsens_sens14_off: s14@3e5 {
+                               reg = <0x3e5 0x2>;
+                               bits = <7 4>;
+                       };
+
+                       tsens_sens15_off: s15@3e6 {
+                               reg = <0x3e6 0x1>;
+                               bits = <3 4>;
+                       };
+
+                       tsens_mode: mode@419 {
+                               reg = <0x419 0x1>;
+                               bits = <0 3>;
+                       };
+
+                       tsens_base0: base0@419 {
+                               reg = <0x419 0x2>;
+                               bits = <3 10>;
+                       };
+
+                       tsens_base1: base1@41a {
+                               reg = <0x41a 0x2>;
+                               bits = <5 10>;
+                       };
+               };
+
+               tsens: thermal-sensor@4a9000 {
+                       compatible = "qcom,ipq5424-tsens";
+                       reg = <0 0x004a9000 0 0x1000>,
+                             <0 0x004a8000 0 0x1000>;
+                       interrupts = <GIC_SPI 105 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "combined";
+                       nvmem-cells = <&tsens_mode>,
+                                     <&tsens_base0>,
+                                     <&tsens_base1>,
+                                     <&tsens_sens9_off>,
+                                     <&tsens_sens10_off>,
+                                     <&tsens_sens11_off>,
+                                     <&tsens_sens12_off>,
+                                     <&tsens_sens13_off>,
+                                     <&tsens_sens14_off>,
+                                     <&tsens_sens15_off>;
+                       nvmem-cell-names = "mode",
+                                          "base0",
+                                          "base1",
+                                          "tsens_sens9_off",
+                                          "tsens_sens10_off",
+                                          "tsens_sens11_off",
+                                          "tsens_sens12_off",
+                                          "tsens_sens13_off",
+                                          "tsens_sens14_off",
+                                          "tsens_sens15_off";
+                       #qcom,sensors = <7>;
+                       #thermal-sensor-cells = <1>;
+               };
+
                rng: rng@4c3000 {
                        compatible = "qcom,ipq5424-trng", "qcom,trng";
                        reg = <0 0x004c3000 0 0x1000>;