xhci: fix event ring segment table related masks and variables in header

[ Upstream commit 8c1cbec9db1ab044167a7594c88bb5906c9d3ee4 ]

xHC controller can supports up to 1024 interrupters.
To fit these change the max_interrupters varable from u8 to u16.

Add a separate mask for the reserve and preserve bits [5:0] in the erst
base register and use it instead of the ERST_PRT_MASK.
ERSR_PTR_MASK [3:0] is intended for masking bits in the
event ring dequeue pointer register.

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20230202150505.618915-2-mathias.nyman@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Stable-dep-of: e5fa8db0be3e ("usb: xhci: fix loss of data on Cadence xHC")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index f9e3aed40984bea57058e6fe58ee7175c2d704b9..1ab3571b882e3f330163651a86bd4db1c4c2030a 100644 (file)
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -2572,8 +2572,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
                        "// Set ERST base address for ir_set 0 = 0x%llx",
                        (unsigned long long)xhci->erst.erst_dma_addr);
        val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
-       val_64 &= ERST_PTR_MASK;
-       val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
+       val_64 &= ERST_BASE_RSVDP;
+       val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_BASE_RSVDP);
        xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
 
        /* Set the event ring dequeue address */

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 4709d509c6972407999772bba48f819c36a405e1..120aa2656320b25f167b33679ca81eb677969522 100644 (file)
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -513,6 +513,9 @@ struct xhci_intr_reg {
 /* Preserve bits 16:31 of erst_size */
 #define        ERST_SIZE_MASK          (0xffff << 16)
 
+/* erst_base bitmasks */
+#define ERST_BASE_RSVDP                (0x3f)
+
 /* erst_dequeue bitmasks */
 /* Dequeue ERST Segment Index (DESI) - Segment number (or alias)
  * where the current dequeue pointer lies.  This is an optional HW hint.
@@ -1777,7 +1780,7 @@ struct xhci_hcd {
        u8              sbrn;
        u16             hci_version;
        u8              max_slots;
-       u8              max_interrupters;
+       u16             max_interrupters;
        u8              max_ports;
        u8              isoc_threshold;
        /* imod_interval in ns (I * 250ns) */