drm/i915/fb: make intel_fb_bo.c less dependent on display

intel_fb_bo.c is i915 core specific code, and should use struct
drm_i915_private instead of struct intel_display.

Switch one DISPLAY_VER() to GRAPHICS_VER(). The check is for < 4, where
they're effectively the same thing.

Reviewed-by: Suraj Kandpal@intel.com>
Link: https://patch.msgid.link/13087bd24bd5af5265ca6af67f086b93e26e311f.1773238670.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fb_bo.c b/drivers/gpu/drm/i915/display/intel_fb_bo.c
index bfecd73d5fa03c9c6d4008a943f863b3e1ab6bd9..a4d49ef450d9da330019dff54ca640a79b8511de 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fb_bo.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_bo.c
@@ -9,8 +9,6 @@
 #include "gem/i915_gem_object.h"
 
 #include "i915_drv.h"
-#include "intel_display_core.h"
-#include "intel_display_types.h"
 #include "intel_fb.h"
 #include "intel_fb_bo.h"
 
@@ -23,7 +21,7 @@ int intel_fb_bo_framebuffer_init(struct drm_gem_object *_obj,
                                 struct drm_mode_fb_cmd2 *mode_cmd)
 {
        struct drm_i915_gem_object *obj = to_intel_bo(_obj);
-       struct intel_display *display = to_intel_display(obj->base.dev);
+       struct drm_i915_private *i915 = to_i915(obj->base.dev);
        unsigned int tiling, stride;
 
        i915_gem_object_lock(obj, NULL);
@@ -38,7 +36,7 @@ int intel_fb_bo_framebuffer_init(struct drm_gem_object *_obj,
                 */
                if (tiling != I915_TILING_NONE &&
                    tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) {
-                       drm_dbg_kms(display->drm,
+                       drm_dbg_kms(&i915->drm,
                                    "tiling_mode doesn't match fb modifier\n");
                        return -EINVAL;
                }
@@ -46,7 +44,7 @@ int intel_fb_bo_framebuffer_init(struct drm_gem_object *_obj,
                if (tiling == I915_TILING_X) {
                        mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED;
                } else if (tiling == I915_TILING_Y) {
-                       drm_dbg_kms(display->drm,
+                       drm_dbg_kms(&i915->drm,
                                    "No Y tiling for legacy addfb\n");
                        return -EINVAL;
                }
@@ -56,9 +54,9 @@ int intel_fb_bo_framebuffer_init(struct drm_gem_object *_obj,
         * gen2/3 display engine uses the fence if present,
         * so the tiling mode must match the fb modifier exactly.
         */
-       if (DISPLAY_VER(display) < 4 &&
+       if (GRAPHICS_VER(i915) < 4 &&
            tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) {
-               drm_dbg_kms(display->drm,
+               drm_dbg_kms(&i915->drm,
                            "tiling_mode must match fb modifier exactly on gen2/3\n");
                return -EINVAL;
        }
@@ -68,7 +66,7 @@ int intel_fb_bo_framebuffer_init(struct drm_gem_object *_obj,
         * the fb pitch and fence stride match.
         */
        if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) {
-               drm_dbg_kms(display->drm,
+               drm_dbg_kms(&i915->drm,
                            "pitch (%d) must match tiling stride (%d)\n",
                            mode_cmd->pitches[0], stride);
                return -EINVAL;