]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Use AMDGPU_MQD_SIZE_ALIGN in KGD
authorLang Yu <lang.yu@amd.com>
Mon, 26 Jan 2026 08:47:39 +0000 (16:47 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Jan 2026 17:26:55 +0000 (12:26 -0500)
Use AMDGPU_MQD_SIZE_ALIGN for both kernel and user queue.

Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

index 8b5801d7109c232f59f9c5a21969ff39e9b69232..77578ecc6782835d7f21d68951083346b717a245 100644 (file)
@@ -385,6 +385,8 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
        struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
        struct amdgpu_ring *ring = &kiq->ring;
        u32 domain = AMDGPU_GEM_DOMAIN_GTT;
+       u32 gfx_mqd_size = max(adev->mqds[AMDGPU_HW_IP_GFX].mqd_size, mqd_size);
+       u32 compute_mqd_size = max(adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size, mqd_size);
 
 #if !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
        /* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */
@@ -424,17 +426,17 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
                for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
                        ring = &adev->gfx.gfx_ring[i];
                        if (!ring->mqd_obj) {
-                               r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
-                                                           domain, &ring->mqd_obj,
+                               r = amdgpu_bo_create_kernel(adev, AMDGPU_MQD_SIZE_ALIGN(gfx_mqd_size),
+                                                               PAGE_SIZE, domain, &ring->mqd_obj,
                                                            &ring->mqd_gpu_addr, &ring->mqd_ptr);
                                if (r) {
                                        dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);
                                        return r;
                                }
 
-                               ring->mqd_size = mqd_size;
+                               ring->mqd_size = gfx_mqd_size;
                                /* prepare MQD backup */
-                               adev->gfx.me.mqd_backup[i] = kzalloc(mqd_size, GFP_KERNEL);
+                               adev->gfx.me.mqd_backup[i] = kzalloc(gfx_mqd_size, GFP_KERNEL);
                                if (!adev->gfx.me.mqd_backup[i]) {
                                        dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);
                                        return -ENOMEM;
@@ -448,17 +450,17 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
                j = i + xcc_id * adev->gfx.num_compute_rings;
                ring = &adev->gfx.compute_ring[j];
                if (!ring->mqd_obj) {
-                       r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
-                                                   domain, &ring->mqd_obj,
+                       r = amdgpu_bo_create_kernel(adev, AMDGPU_MQD_SIZE_ALIGN(compute_mqd_size),
+                                                       PAGE_SIZE, domain, &ring->mqd_obj,
                                                    &ring->mqd_gpu_addr, &ring->mqd_ptr);
                        if (r) {
                                dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);
                                return r;
                        }
 
-                       ring->mqd_size = mqd_size;
+                       ring->mqd_size = compute_mqd_size;
                        /* prepare MQD backup */
-                       adev->gfx.mec.mqd_backup[j] = kzalloc(mqd_size, GFP_KERNEL);
+                       adev->gfx.mec.mqd_backup[j] = kzalloc(compute_mqd_size, GFP_KERNEL);
                        if (!adev->gfx.mec.mqd_backup[j]) {
                                dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name);
                                return -ENOMEM;
index 08ae50a6313f36ed83da7c775fde0327e1c8c085..eb9725ae1607a61cce0cd8052d3a352f1ef80881 100644 (file)
@@ -2236,7 +2236,7 @@ static int gfx_v12_1_compute_mqd_init(struct amdgpu_device *adev, void *m,
        mqd->cp_hqd_queue_priority = prop->hqd_queue_priority;
 
        mqd->cp_mqd_stride_size = prop->mqd_stride_size ? prop->mqd_stride_size :
-               sizeof(struct v12_1_compute_mqd);
+               AMDGPU_MQD_SIZE_ALIGN(adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size);
 
        mqd->cp_hqd_active = prop->hqd_active;
 
index f2309d72bbe675760fb22b8123424c2b8d251017..9508709abd49a866de5c0bea0f268385060768c0 100644 (file)
@@ -289,7 +289,8 @@ static int mes_userq_mqd_create(struct amdgpu_usermode_queue *queue,
                return -ENOMEM;
        }
 
-       r = amdgpu_userq_create_object(uq_mgr, &queue->mqd, mqd_hw_default->mqd_size);
+       r = amdgpu_userq_create_object(uq_mgr, &queue->mqd,
+                       AMDGPU_MQD_SIZE_ALIGN(mqd_hw_default->mqd_size));
        if (r) {
                DRM_ERROR("Failed to create MQD object for userqueue\n");
                goto free_props;