]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
x86/vmscape: Add old Intel CPUs to affected list
authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Fri, 29 Aug 2025 22:28:52 +0000 (15:28 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 11 Sep 2025 15:23:22 +0000 (17:23 +0200)
Commit 8a68d64bb10334426834e8c273319601878e961e upstream.

These old CPUs are not tested against VMSCAPE, but are likely vulnerable.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/kernel/cpu/common.c

index acac92fe6c166c4d2c89d7e442e995887608e4b3..bce82fa055e492e779f86e5f23539b529e27b6dd 100644 (file)
@@ -1239,15 +1239,18 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
 #define VMSCAPE                BIT(11)
 
 static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
-       VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE,          X86_STEP_MAX,      SRBDS),
-       VULNBL_INTEL_STEPS(INTEL_HASWELL,            X86_STEP_MAX,      SRBDS),
-       VULNBL_INTEL_STEPS(INTEL_HASWELL_L,          X86_STEP_MAX,      SRBDS),
-       VULNBL_INTEL_STEPS(INTEL_HASWELL_G,          X86_STEP_MAX,      SRBDS),
-       VULNBL_INTEL_STEPS(INTEL_HASWELL_X,          X86_STEP_MAX,      MMIO),
-       VULNBL_INTEL_STEPS(INTEL_BROADWELL_D,        X86_STEP_MAX,      MMIO),
-       VULNBL_INTEL_STEPS(INTEL_BROADWELL_G,        X86_STEP_MAX,      SRBDS),
-       VULNBL_INTEL_STEPS(INTEL_BROADWELL_X,        X86_STEP_MAX,      MMIO),
-       VULNBL_INTEL_STEPS(INTEL_BROADWELL,          X86_STEP_MAX,      SRBDS),
+       VULNBL_INTEL_STEPS(INTEL_SANDYBRIDGE_X,      X86_STEP_MAX,      VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_SANDYBRIDGE,        X86_STEP_MAX,      VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE_X,        X86_STEP_MAX,      VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE,          X86_STEP_MAX,      SRBDS | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_HASWELL,            X86_STEP_MAX,      SRBDS | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_HASWELL_L,          X86_STEP_MAX,      SRBDS | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_HASWELL_G,          X86_STEP_MAX,      SRBDS | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_HASWELL_X,          X86_STEP_MAX,      MMIO | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_BROADWELL_D,        X86_STEP_MAX,      MMIO | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_BROADWELL_X,        X86_STEP_MAX,      MMIO | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_BROADWELL_G,        X86_STEP_MAX,      SRBDS | VMSCAPE),
+       VULNBL_INTEL_STEPS(INTEL_BROADWELL,          X86_STEP_MAX,      SRBDS | VMSCAPE),
        VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X,                   0x5,      MMIO | RETBLEED | GDS | VMSCAPE),
        VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X,          X86_STEP_MAX,      MMIO | RETBLEED | GDS | ITS | VMSCAPE),
        VULNBL_INTEL_STEPS(INTEL_SKYLAKE_L,          X86_STEP_MAX,      MMIO | RETBLEED | GDS | SRBDS | VMSCAPE),