arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu node

[ Upstream commit c604fd810bda667bdc20b2c041917baa7803e0fb ]

Dts files with Rockchip rk3399 'gpu' nodes were manually verified.
In order to automate this process arm,mali-midgard.txt
has been converted to yaml. In the new setup dtbs_check with
arm,mali-midgard.yaml expects interrupts and interrupt-names values
in the same order. Fix this for rk3399.

make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/
arm,mali-midgard.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 5c4238a80144b7780811256cc800f96a3984b6b6..c341172ec2085fcfc54a96cdfdc5179e4982f896 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1890,10 +1890,10 @@
        gpu: gpu@ff9a0000 {
                compatible = "rockchip,rk3399-mali", "arm,mali-t860";
                reg = <0x0 0xff9a0000 0x0 0x10000>;
-               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
-                            <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
-                            <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
-               interrupt-names = "gpu", "job", "mmu";
+               interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "job", "mmu", "gpu";
                clocks = <&cru ACLK_GPU>;
                #cooling-cells = <2>;
                power-domains = <&power RK3399_PD_GPU>;