]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: imx8mm-beacon: Fix HS400 USDHC clock speed
authorAdam Ford <aford173@gmail.com>
Fri, 20 Jun 2025 21:34:45 +0000 (16:34 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 15 Aug 2025 10:04:55 +0000 (12:04 +0200)
[ Upstream commit f83f69097a302ed2a2775975ddcf12e6a5ac6ec3 ]

The reference manual for the i.MX8MM states the clock rate in
MMC mode is 1/2 of the input clock, therefore to properly run
at HS400 rates, the input clock must be 400MHz to operate at
200MHz.  Currently the clock is set to 200MHz which is half the
rate it should be, so the throughput is half of what it should be
for HS400 operation.

Fixes: 593816fa2f35 ("arm64: dts: imx: Add Beacon i.MX8m-Mini development kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi

index 140e251094fa4602125216b350761397de3776e1..94bec023868c0bd0088276b9ba1f70bc5ae42ec9 100644 (file)
        pinctrl-0 = <&pinctrl_usdhc3>;
        pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
        pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       assigned-clocks = <&clk IMX8MM_CLK_USDHC3>;
+       assigned-clock-rates = <400000000>;
        bus-width = <8>;
        non-removable;
        status = "okay";