ASoC: tlv320aic32x4: Fix bdiv clock rate derivation

[ Upstream commit 40b37136287ba6b34aa2f1f6123f3d6d205dc2f0 ]

Current code expects a single channel to be always used. Fix this
situation by forwarding the number of channels used. Then fix the
derivation of the bdiv clock rate.

Fixes: 96c3bb00239d ("ASoC: tlv320aic32x4: Dynamically Determine Clocking")
Suggested-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20200911173140.29984-3-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c
index d087f3b20b1d5a2e60790efd1eedac6431d4b649..50b66cf9ea8f913d42ecb5c620938dee489dea0f 100644 (file)
--- a/sound/soc/codecs/tlv320aic32x4.c
+++ b/sound/soc/codecs/tlv320aic32x4.c
@@ -665,7 +665,7 @@ static int aic32x4_set_processing_blocks(struct snd_soc_component *component,
 }
 
 static int aic32x4_setup_clocks(struct snd_soc_component *component,
-                               unsigned int sample_rate)
+                               unsigned int sample_rate, unsigned int channels)
 {
        u8 aosr;
        u16 dosr;
@@ -753,7 +753,9 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component,
                                                        dosr);
 
                                                clk_set_rate(clocks[5].clk,
-                                                       sample_rate * 32);
+                                                       sample_rate * 32 *
+                                                       channels);
+
                                                return 0;
                                        }
                                }
@@ -775,7 +777,8 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
        u8 iface1_reg = 0;
        u8 dacsetup_reg = 0;
 
-       aic32x4_setup_clocks(component, params_rate(params));
+       aic32x4_setup_clocks(component, params_rate(params),
+                            params_channels(params));
 
        switch (params_width(params)) {
        case 16: