pci: pcie_dw_meson: Use dw_pcie_link_set_max_link_width()

Use dw_pcie_link_set_max_link_width() instead of local implementation
of the same functionality. This does change the behavior slightly, as
the dw_pcie_link_set_max_link_width() implementation also programs the
LNKCAP register MLW, this should however be correct and is now aligned
with Linux kernel behavior.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
index bb78e7874b14d1f8f186cd4e6d37623db42c6ea0..483b07ce078d751f6d33e22e4a633c915e4cf929 100644 (file)
--- a/drivers/pci/pcie_dw_meson.c
+++ b/drivers/pci/pcie_dw_meson.c
@@ -115,13 +115,9 @@ static void meson_pcie_configure(struct meson_pcie *priv)
        val &= ~PORT_LINK_FAST_LINK_MODE;
        val |= PORT_LINK_DLL_LINK_EN;
        val &= ~PORT_LINK_MODE_MASK;
-       val |= PORT_LINK_MODE_1_LANES;
        writel(val, priv->dw.dbi_base + PCIE_PORT_LINK_CONTROL);
 
-       val = readl(priv->dw.dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL);
-       val &= ~PORT_LOGIC_LINK_WIDTH_MASK;
-       val |= PORT_LOGIC_LINK_WIDTH_1_LANES;
-       writel(val, priv->dw.dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL);
+       dw_pcie_link_set_max_link_width(&priv->dw, 1);
 
        dw_pcie_dbi_write_enable(&priv->dw, false);
 }