drm/amdgpu: Fix hard hang for S/G display BOs.

[ Upstream commit e4c4073b0139d055d43a9568690fc560aab4fa5c ]

HW requires for caching to be unset for scanout BO
mappings when the BO placement is in GTT memory.
Usually the flag to unset is passed from user mode
but for FB mode this was missing.

v2:
Keep all BO placement logic in amdgpu_display_supported_domains

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index e4760921883923a7d4f9669e8235e8dd28a63d8d..bf0c61baa05c7207022b896ec2e791655a9dc5fc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -137,14 +137,14 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
        mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
                                                  fb_tiled);
        domain = amdgpu_display_supported_domains(adev);
-
        height = ALIGN(mode_cmd->height, 8);
        size = mode_cmd->pitches[0] * height;
        aligned_size = ALIGN(size, PAGE_SIZE);
        ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
                                       AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
-                                      AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
-                                      AMDGPU_GEM_CREATE_VRAM_CLEARED,
+                                      AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS     |
+                                      AMDGPU_GEM_CREATE_VRAM_CLEARED        |
+                                      AMDGPU_GEM_CREATE_CPU_GTT_USWC,
                                       ttm_bo_type_kernel, NULL, &gobj);
        if (ret) {
                pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
@@ -166,7 +166,6 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
                        dev_err(adev->dev, "FB failed to set tiling flags\n");
        }
 
-
        ret = amdgpu_bo_pin(abo, domain);
        if (ret) {
                amdgpu_bo_unreserve(abo);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index d4fcf5475464645f0661f4aea7c69e69b5dd96df..6fc77ac814d8eed6b9d99b82a06d9bc489fc83d0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -746,7 +746,8 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
        struct amdgpu_device *adev = dev->dev_private;
        struct drm_gem_object *gobj;
        uint32_t handle;
-       u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
+       u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
+                   AMDGPU_GEM_CREATE_CPU_GTT_USWC;
        u32 domain;
        int r;