Don't issue vzeroupper for vzeroupper call_insn.

gcc/ChangeLog:

	PR target/82735
	* config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
	vzeroupper for vzeroupper call_insn.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx-vzeroupper-30.c: New test.

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 0761965344bf25ab4cf0396d625ca96d2c5eb01a..caca74d6dec6153a2f9278d0d46c49af4d72356d 100644 (file)
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -14489,8 +14489,9 @@ ix86_avx_u128_mode_needed (rtx_insn *insn)
         modes wider than 256 bits.  It's only safe to issue a
         vzeroupper if all SSE registers are clobbered.  */
       const function_abi &abi = insn_callee_abi (insn);
-      if (!hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
-                                 abi.mode_clobbers (V4DImode)))
+      if (vzeroupper_pattern (PATTERN (insn), VOIDmode)
+         || !hard_reg_set_subset_p (reg_class_contents[SSE_REGS],
+                                    abi.mode_clobbers (V4DImode)))
        return AVX_U128_ANY;
 
       return AVX_U128_CLEAN;

diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c
new file mode 100644 (file)
index 0000000..c1c9baa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-30.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */
+
+#include <immintrin.h>
+
+extern __m256 x, y;
+
+void
+foo ()
+{
+  x = y;
+  _mm256_zeroupper ();
+}
+
+/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */