]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart
authorSherry Sun <sherry.sun@nxp.com>
Wed, 3 Dec 2025 01:59:56 +0000 (09:59 +0800)
committerShawn Guo <shawnguo@kernel.org>
Tue, 30 Dec 2025 02:34:19 +0000 (10:34 +0800)
The commit 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But miss
update imx8qm-ss-dma.dtsi.

The commit 5a8e9b022e569 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
dma-names") just simple add dma-names as binding doc requirement.

Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines for
the FSL_EDMA_RX flag.

Fixes: 5a8e9b022e56 ("arm64: dts: imx8qm-ss-dma: Pass lpuart dma-names")
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi

index 5f24850bf322a4de76844709f48a59afbd949cfb..974e193f8dcb903845c22d8f86281d7fe7fb89c2 100644 (file)
 
 &lpuart0 {
        compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-       dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
+       dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
        dma-names = "rx","tx";
 };
 
 &lpuart1 {
        compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-       dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
+       dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
        dma-names = "rx","tx";
 };
 
 &lpuart2 {
        compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-       dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
+       dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
        dma-names = "rx","tx";
 };
 
 &lpuart3 {
        compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
-       dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
+       dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
        dma-names = "rx","tx";
 };