by sorb, and also dealing with any address size override
present. */
static
-IRExpr* handleAddrOverrides ( Prefix pfx, IRExpr* virtual )
+IRExpr* handleAddrOverrides ( VexAbiInfo* vbi,
+ Prefix pfx, IRExpr* virtual )
{
/* --- segment overrides --- */
-
if (pfx & PFX_FS) {
- /* Note that this is a linux-kernel specific hack that relies
- on the assumption that %fs is always zero. */
- /* return virtual + guest_FS_ZERO. */
- virtual = binop(Iop_Add64, virtual, IRExpr_Get(OFFB_FS_ZERO, Ity_I64));
+ if (vbi->guest_amd64_assume_fs_is_zero) {
+ /* Note that this is a linux-kernel specific hack that relies
+ on the assumption that %fs is always zero. */
+ /* return virtual + guest_FS_ZERO. */
+ virtual = binop(Iop_Add64, virtual,
+ IRExpr_Get(OFFB_FS_ZERO, Ity_I64));
+ } else {
+ unimplemented("amd64 %fs segment override");
+ }
}
if (pfx & PFX_GS) {
- /* Note that this is a darwin-kernel specific hack that relies
- on the assumption that %gs is always 0x60. */
- /* return virtual + guest_GS_0x60. */
- virtual = binop(Iop_Add64, virtual, IRExpr_Get(OFFB_GS_0x60, Ity_I64));
+ if (vbi->guest_amd64_assume_gs_is_0x60) {
+ /* Note that this is a darwin-kernel specific hack that relies
+ on the assumption that %gs is always 0x60. */
+ /* return virtual + guest_GS_0x60. */
+ virtual = binop(Iop_Add64, virtual,
+ IRExpr_Get(OFFB_GS_0x60, Ity_I64));
+ } else {
+ unimplemented("amd64 %gs segment override");
+ }
}
/* cs, ds, es and ss are simply ignored in 64-bit mode. */
}
static
-IRTemp disAMode ( Int* len, Prefix pfx, Long delta,
- HChar* buf, Int extra_bytes )
+IRTemp disAMode ( /*OUT*/Int* len,
+ VexAbiInfo* vbi, Prefix pfx, Long delta,
+ /*OUT*/HChar* buf, Int extra_bytes )
{
UChar mod_reg_rm = getUChar(delta);
delta++;
DIS(buf, "%s(%s)", segRegTxt(pfx), nameIRegRexB(8,pfx,rm));
*len = 1;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx, getIRegRexB(8,pfx,rm)));
+ handleAddrOverrides(vbi, pfx, getIRegRexB(8,pfx,rm)));
}
/* REX.B==0: d8(%rax) ... d8(%rdi), not including d8(%rsp)
}
*len = 2;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64,getIRegRexB(8,pfx,rm),mkU64(d))));
}
DIS(buf, "%s%lld(%s)", segRegTxt(pfx), d, nameIRegRexB(8,pfx,rm));
*len = 5;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64,getIRegRexB(8,pfx,rm),mkU64(d))));
}
guest_RIP_next_assumed = guest_RIP_bbstart
+ delta+4 + extra_bytes;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64, mkU64(guest_RIP_next_assumed),
mkU64(d))));
}
*len = 2;
return
disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64,
getIRegRexB(8,pfx,base_r),
binop(Iop_Shl64, getIReg64rexX(pfx,index_r),
*len = 6;
return
disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64,
binop(Iop_Shl64, getIReg64rexX(pfx,index_r),
mkU8(scale)),
DIS(buf, "%s(%s)", segRegTxt(pfx), nameIRegRexB(8,pfx,base_r));
*len = 2;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx, getIRegRexB(8,pfx,base_r)));
+ handleAddrOverrides(vbi, pfx, getIRegRexB(8,pfx,base_r)));
}
if (index_is_SP && base_is_BPor13) {
DIS(buf, "%s%lld", segRegTxt(pfx), d);
*len = 6;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx, mkU64(d)));
+ handleAddrOverrides(vbi, pfx, mkU64(d)));
}
vassert(0);
d, nameIRegRexB(8,pfx,base_r));
*len = 3;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64, getIRegRexB(8,pfx,base_r), mkU64(d)) ));
} else {
if (scale == 0) {
*len = 3;
return
disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64,
binop(Iop_Add64,
getIRegRexB(8,pfx,base_r),
d, nameIRegRexB(8,pfx,base_r));
*len = 6;
return disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64, getIRegRexB(8,pfx,base_r), mkU64(d)) ));
} else {
if (scale == 0) {
*len = 6;
return
disAMode_copy2tmp(
- handleAddrOverrides(pfx,
+ handleAddrOverrides(vbi, pfx,
binop(Iop_Add64,
binop(Iop_Add64,
getIRegRexB(8,pfx,base_r),
PUT tmpa, %G
*/
static
-ULong dis_op2_E_G ( Prefix pfx,
+ULong dis_op2_E_G ( VexAbiInfo* vbi,
+ Prefix pfx,
Bool addSubCarry,
IROp op8,
Bool keep,
return 1+delta0;
} else {
/* E refers to memory */
- addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
assign( dst0, getIRegG(size,pfx,rm) );
assign( src, loadLE(szToITy(size), mkexpr(addr)) );
ST tmpv, (tmpa)
*/
static
-ULong dis_op2_G_E ( Prefix pfx,
+ULong dis_op2_G_E ( VexAbiInfo* vbi,
+ Prefix pfx,
Bool addSubCarry,
IROp op8,
Bool keep,
/* E refers to memory */
{
- addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
assign(dst0, loadLE(ty,mkexpr(addr)));
assign(src, getIRegG(size,pfx,rm));
PUT tmpb, %G
*/
static
-ULong dis_mov_E_G ( Prefix pfx,
+ULong dis_mov_E_G ( VexAbiInfo* vbi,
+ Prefix pfx,
Int size,
Long delta0 )
{
/* E refers to memory */
{
- IRTemp addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ IRTemp addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
putIRegG(size, pfx, rm, loadLE(szToITy(size), mkexpr(addr)));
DIP("mov%c %s,%s\n", nameISize(size),
dis_buf,
ST tmpv, (tmpa)
*/
static
-ULong dis_mov_G_E ( Prefix pfx,
+ULong dis_mov_G_E ( VexAbiInfo* vbi,
+ Prefix pfx,
Int size,
Long delta0 )
{
/* E refers to memory */
{
- IRTemp addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ IRTemp addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
storeLE( mkexpr(addr), getIRegG(size, pfx, rm) );
DIP("mov%c %s,%s\n", nameISize(size),
nameIRegG(size,pfx,rm),
/* Sign- and Zero-extending moves. */
static
-ULong dis_movx_E_G ( Prefix pfx,
+ULong dis_movx_E_G ( VexAbiInfo* vbi,
+ Prefix pfx,
Long delta, Int szs, Int szd, Bool sign_extend )
{
UChar rm = getUChar(delta);
{
Int len;
HChar dis_buf[50];
- IRTemp addr = disAMode ( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode ( &len, vbi, pfx, delta, dis_buf, 0 );
putIRegG(szd, pfx, rm,
doScalarWidening(
szs,szd,sign_extend,
}
static
-ULong dis_Grp1 ( Prefix pfx,
+ULong dis_Grp1 ( VexAbiInfo* vbi,
+ Prefix pfx,
Long delta, UChar modrm,
Int am_sz, Int d_sz, Int sz, Long d64 )
{
nameGrp1(gregLO3ofRM(modrm)), nameISize(sz), d64,
nameIRegE(sz,pfx,modrm));
} else {
- addr = disAMode ( &len, pfx, delta, dis_buf, /*xtra*/d_sz );
+ addr = disAMode ( &len, vbi, pfx, delta, dis_buf, /*xtra*/d_sz );
assign(dst0, loadLE(ty,mkexpr(addr)));
assign(src, mkU(ty,d64 & mask));
expression. */
static
-ULong dis_Grp2 ( Prefix pfx,
+ULong dis_Grp2 ( VexAbiInfo* vbi,
+ Prefix pfx,
Long delta, UChar modrm,
Int am_sz, Int d_sz, Int sz, IRExpr* shift_expr,
HChar* shift_expr_txt, Bool* decode_OK )
assign(dst0, getIRegE(sz, pfx, modrm));
delta += (am_sz + d_sz);
} else {
- addr = disAMode ( &len, pfx, delta, dis_buf, /*xtra*/d_sz );
+ addr = disAMode ( &len, vbi, pfx, delta, dis_buf, /*xtra*/d_sz );
assign(dst0, loadLE(ty,mkexpr(addr)));
delta += len + d_sz;
}
/* Group 8 extended opcodes (but BT/BTS/BTC/BTR only). */
static
-ULong dis_Grp8_Imm ( Prefix pfx,
+ULong dis_Grp8_Imm ( VexAbiInfo* vbi,
+ Prefix pfx,
Long delta, UChar modrm,
Int am_sz, Int sz, ULong src_val,
Bool* decode_OK )
src_val, nameIRegE(sz,pfx,modrm));
} else {
Int len;
- t_addr = disAMode ( &len, pfx, delta, dis_buf, 1 );
+ t_addr = disAMode ( &len, vbi, pfx, delta, dis_buf, 1 );
delta += (len+1);
assign( t2, widenUto64(loadLE(ty, mkexpr(t_addr))) );
DIP("%s%c $0x%llx, %s\n", nameGrp8(gregLO3ofRM(modrm)),
/* Group 3 extended opcodes. */
static
-ULong dis_Grp3 ( Prefix pfx, Int sz, Long delta, Bool* decode_OK )
+ULong dis_Grp3 ( VexAbiInfo* vbi,
+ Prefix pfx, Int sz, Long delta, Bool* decode_OK )
{
Long d64;
UChar modrm;
dst1 = newTemp(ty);
assign(dst0, mkU(ty,0));
assign(src, getIRegE(sz, pfx, modrm));
- assign(dst1, binop(mkSizedOp(ty,Iop_Sub8), mkexpr(dst0), mkexpr(src)));
+ assign(dst1, binop(mkSizedOp(ty,Iop_Sub8), mkexpr(dst0),
+ mkexpr(src)));
setFlags_DEP1_DEP2(Iop_Sub8, dst0, src, ty);
putIRegE(sz, pfx, modrm, mkexpr(dst1));
DIP("neg%c %s\n", nameISize(sz), nameIRegE(sz, pfx, modrm));
vpanic("Grp3(amd64,R)");
}
} else {
- addr = disAMode ( &len, pfx, delta, dis_buf,
+ addr = disAMode ( &len, vbi, pfx, delta, dis_buf,
/* we have to inform disAMode of any immediate
bytes used */
gregLO3ofRM(modrm)==0/*TEST*/
dst1 = newTemp(ty);
assign(dst0, mkU(ty,0));
assign(src, mkexpr(t1));
- assign(dst1, binop(mkSizedOp(ty,Iop_Sub8), mkexpr(dst0), mkexpr(src)));
+ assign(dst1, binop(mkSizedOp(ty,Iop_Sub8), mkexpr(dst0),
+ mkexpr(src)));
setFlags_DEP1_DEP2(Iop_Sub8, dst0, src, ty);
storeLE( mkexpr(addr), mkexpr(dst1) );
DIP("neg%c %s\n", nameISize(sz), dis_buf);
/* Group 4 extended opcodes. */
static
-ULong dis_Grp4 ( Prefix pfx, Long delta, Bool* decode_OK )
+ULong dis_Grp4 ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta, Bool* decode_OK )
{
Int alen;
UChar modrm;
DIP("%sb %s\n", nameGrp4(gregLO3ofRM(modrm)),
nameIRegE(1, pfx, modrm));
} else {
- IRTemp addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( t1, loadLE(ty, mkexpr(addr)) );
switch (gregLO3ofRM(modrm)) {
case 0: /* INC */
showSz ? nameISize(sz) : ' ',
nameIRegE(sz, pfx, modrm));
} else {
- addr = disAMode ( &len, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &len, vbi, pfx, delta, dis_buf, 0 );
if (gregLO3ofRM(modrm) != 2 && gregLO3ofRM(modrm) != 4
&& gregLO3ofRM(modrm) != 6) {
assign(t1, loadLE(ty,mkexpr(addr)));
/* IMUL E, G. Supplied eip points to the modR/M byte. */
static
-ULong dis_mul_E_G ( Prefix pfx,
+ULong dis_mul_E_G ( VexAbiInfo* vbi,
+ Prefix pfx,
Int size,
Long delta0 )
{
if (epartIsReg(rm)) {
assign( te, getIRegE(size, pfx, rm) );
} else {
- IRTemp addr = disAMode( &alen, pfx, delta0, dis_buf, 0 );
+ IRTemp addr = disAMode( &alen, vbi, pfx, delta0, dis_buf, 0 );
assign( te, loadLE(ty,mkexpr(addr)) );
}
/* IMUL I * E -> G. Supplied rip points to the modR/M byte. */
static
-ULong dis_imul_I_E_G ( Prefix pfx,
+ULong dis_imul_I_E_G ( VexAbiInfo* vbi,
+ Prefix pfx,
Int size,
Long delta,
Int litsize )
assign(te, getIRegE(size, pfx, rm));
delta++;
} else {
- IRTemp addr = disAMode( &alen, pfx, delta, dis_buf,
+ IRTemp addr = disAMode( &alen, vbi, pfx, delta, dis_buf,
imin(4,litsize) );
assign(te, loadLE(ty, mkexpr(addr)));
delta += alen;
static
ULong dis_FPU ( /*OUT*/Bool* decode_ok,
- Prefix pfx, Long delta )
+ VexAbiInfo* vbi, Prefix pfx, Long delta )
{
Int len;
UInt r_src, r_dst;
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
IROp fop;
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
IROp fop;
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
/* bits 5,4,3 are an opcode extension, and the modRM also
specifies an address. */
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
switch (gregLO3ofRM(modrm)) {
responsibility of its caller. */
static
-ULong dis_MMXop_regmem_to_reg ( Prefix pfx,
- Long delta,
- UChar opc,
- HChar* name,
- Bool show_granularity )
+ULong dis_MMXop_regmem_to_reg ( VexAbiInfo* vbi,
+ Prefix pfx,
+ Long delta,
+ UChar opc,
+ HChar* name,
+ Bool show_granularity )
{
HChar dis_buf[50];
UChar modrm = getUChar(delta);
argE = getMMXReg(eregLO3ofRM(modrm));
} else {
Int len;
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
argE = loadLE(Ity_I64, mkexpr(addr));
}
/* Vector by scalar shift of G by the amount specified at the bottom
of E. This is a straight copy of dis_SSE_shiftG_byE. */
-static ULong dis_MMX_shiftG_byE ( Prefix pfx, Long delta,
+static ULong dis_MMX_shiftG_byE ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, IROp op )
{
HChar dis_buf[50];
nameMMXReg(gregLO3ofRM(rm)) );
delta++;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( amt, loadLE(Ity_I64, mkexpr(addr)) );
DIP("%s %s,%s\n", opname,
dis_buf,
/* Completely handle all MMX instructions except emms. */
static
-ULong dis_MMX ( Bool* decode_ok, Prefix pfx, Int sz, Long delta )
+ULong dis_MMX ( Bool* decode_ok,
+ VexAbiInfo* vbi, Prefix pfx, Int sz, Long delta )
{
Int len;
UChar modrm;
nameIReg32(eregOfRexRM(pfx,modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
putMMXReg(
gregLO3ofRM(modrm),
nameIReg64(eregOfRexRM(pfx,modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
putMMXReg( gregLO3ofRM(modrm),
loadLE(Ity_I64, mkexpr(addr)) );
nameMMXReg(gregLO3ofRM(modrm)),
nameIReg32(eregOfRexRM(pfx,modrm)));
} else {
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
storeLE( mkexpr(addr),
unop(Iop_64to32, getMMXReg(gregLO3ofRM(modrm)) ) );
nameMMXReg(gregLO3ofRM(modrm)),
nameIReg64(eregOfRexRM(pfx,modrm)));
} else {
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
storeLE( mkexpr(addr),
getMMXReg(gregLO3ofRM(modrm)) );
nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
putMMXReg( gregLO3ofRM(modrm), loadLE(Ity_I64, mkexpr(addr)) );
DIP("movq %s, %s\n",
these. */
goto mmx_decode_failure;
} else {
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
storeLE( mkexpr(addr), getMMXReg(gregLO3ofRM(modrm)) );
DIP("mov(nt)q %s, %s\n",
case 0xFE: /* PADDgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "padd", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "padd", True );
break;
case 0xEC:
case 0xED: /* PADDSgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "padds", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "padds", True );
break;
case 0xDC:
case 0xDD: /* PADDUSgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "paddus", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "paddus", True );
break;
case 0xF8:
case 0xFA: /* PSUBgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "psub", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "psub", True );
break;
case 0xE8:
case 0xE9: /* PSUBSgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "psubs", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "psubs", True );
break;
case 0xD8:
case 0xD9: /* PSUBUSgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "psubus", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "psubus", True );
break;
case 0xE5: /* PMULHW (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pmulhw", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pmulhw", False );
break;
case 0xD5: /* PMULLW (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pmullw", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pmullw", False );
break;
case 0xF5: /* PMADDWD (src)mmxreg-or-mem, (dst)mmxreg */
vassert(sz == 4);
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pmaddwd", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pmaddwd", False );
break;
case 0x74:
case 0x76: /* PCMPEQgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pcmpeq", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pcmpeq", True );
break;
case 0x64:
case 0x66: /* PCMPGTgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pcmpgt", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pcmpgt", True );
break;
case 0x6B: /* PACKSSDW (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "packssdw", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "packssdw", False );
break;
case 0x63: /* PACKSSWB (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "packsswb", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "packsswb", False );
break;
case 0x67: /* PACKUSWB (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "packuswb", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "packuswb", False );
break;
case 0x68:
case 0x6A: /* PUNPCKHgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "punpckh", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "punpckh", True );
break;
case 0x60:
case 0x62: /* PUNPCKLgg (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "punpckl", True );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "punpckl", True );
break;
case 0xDB: /* PAND (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pand", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pand", False );
break;
case 0xDF: /* PANDN (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pandn", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pandn", False );
break;
case 0xEB: /* POR (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "por", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "por", False );
break;
case 0xEF: /* PXOR (src)mmxreg-or-mem, (dst)mmxreg */
if (sz != 4)
goto mmx_decode_failure;
- delta = dis_MMXop_regmem_to_reg ( pfx, delta, opc, "pxor", False );
+ delta = dis_MMXop_regmem_to_reg ( vbi, pfx, delta, opc, "pxor", False );
break;
-# define SHIFT_BY_REG(_name,_op) \
- delta = dis_MMX_shiftG_byE(pfx, delta, _name, _op); \
+# define SHIFT_BY_REG(_name,_op) \
+ delta = dis_MMX_shiftG_byE(vbi, pfx, delta, _name, _op); \
break;
/* PSLLgg (src)mmxreg-or-mem, (dst)mmxreg */
goto mmx_decode_failure;
delta++;
- assign( addr, handleAddrOverrides( pfx, getIReg64(R_RDI) ));
+ assign( addr, handleAddrOverrides( vbi, pfx, getIReg64(R_RDI) ));
assign( regM, getMMXReg( eregLO3ofRM(modrm) ));
assign( regD, getMMXReg( gregLO3ofRM(modrm) ));
assign( mask, binop(Iop_SarN8x8, mkexpr(regM), mkU8(7)) );
/* Double length left and right shifts. Apparently only required in
v-size (no b- variant). */
static
-ULong dis_SHLRD_Gv_Ev ( Prefix pfx,
+ULong dis_SHLRD_Gv_Ev ( VexAbiInfo* vbi,
+ Prefix pfx,
Long delta, UChar modrm,
Int sz,
IRExpr* shift_amt,
shift_amt_txt,
nameIRegG(sz, pfx, modrm), nameIRegE(sz, pfx, modrm));
} else {
- addr = disAMode ( &len, pfx, delta, dis_buf,
+ addr = disAMode ( &len, vbi, pfx, delta, dis_buf,
/* # bytes following amode */
amt_is_literal ? 1 : 0 );
delta += len;
static
-ULong dis_bt_G_E ( Prefix pfx, Int sz, Long delta, BtOp op )
+ULong dis_bt_G_E ( VexAbiInfo* vbi,
+ Prefix pfx, Int sz, Long delta, BtOp op )
{
HChar dis_buf[50];
UChar modrm;
mkU64(sz == 8 ? 63 : sz == 4 ? 31 : 15)) );
} else {
- t_addr0 = disAMode ( &len, pfx, delta, dis_buf, 0 );
+ t_addr0 = disAMode ( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
assign( t_bitno1, mkexpr(t_bitno0) );
}
/* Handle BSF/BSR. Only v-size seems necessary. */
static
-ULong dis_bs_E_G ( Prefix pfx, Int sz, Long delta, Bool fwds )
+ULong dis_bs_E_G ( VexAbiInfo* vbi,
+ Prefix pfx, Int sz, Long delta, Bool fwds )
{
Bool isReg;
UChar modrm;
assign( src, getIRegE(sz, pfx, modrm) );
} else {
Int len;
- IRTemp addr = disAMode( &len, pfx, delta, dis_buf, 0 );
+ IRTemp addr = disAMode( &len, vbi, pfx, delta, dis_buf, 0 );
delta += len;
assign( src, loadLE(ty, mkexpr(addr)) );
}
static
ULong dis_cmpxchg_G_E ( /*OUT*/Bool* ok,
+ VexAbiInfo* vbi,
Prefix pfx,
Int size,
Long delta0 )
nameIRegG(size,pfx,rm),
nameIRegE(size,pfx,rm) );
} else {
- addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
assign( dest, loadLE(ty, mkexpr(addr)) );
delta0 += len;
DIP("cmpxchg%c %s,%s\n", nameISize(size),
static
ULong dis_cmpxchg8b ( /*OUT*/Bool* ok,
+ VexAbiInfo* vbi,
Prefix pfx,
Int sz,
Long delta0 )
return delta0;
}
- addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
delta0 += len;
DIP("cmpxchg%s %s\n", sz == 4 ? "8" : "16", dis_buf);
PUT tmpd, %G
*/
static
-ULong dis_cmov_E_G ( Prefix pfx,
+ULong dis_cmov_E_G ( VexAbiInfo* vbi,
+ Prefix pfx,
Int sz,
AMD64Condcode cond,
Long delta0 )
/* E refers to memory */
{
- IRTemp addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ IRTemp addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
assign( tmps, loadLE(ty, mkexpr(addr)) );
assign( tmpd, getIRegG(sz, pfx, rm) );
static
ULong dis_xadd_G_E ( /*OUT*/Bool* decode_ok,
+ VexAbiInfo* vbi,
Prefix pfx, Int sz, Long delta0 )
{
Int len;
*decode_ok = False;
return delta0;
} else {
- IRTemp addr = disAMode ( &len, pfx, delta0, dis_buf, 0 );
+ IRTemp addr = disAMode ( &len, vbi, pfx, delta0, dis_buf, 0 );
assign( tmpd, loadLE(ty, mkexpr(addr)) );
assign( tmpt0, getIRegG(sz, pfx, rm) );
assign( tmpt1, binop(mkSizedOp(ty,Iop_Add8), mkexpr(tmpd), mkexpr(tmpt0)) );
*/
static ULong dis_SSE_E_to_G_all_wrk (
+ VexAbiInfo* vbi,
Prefix pfx, Long delta,
HChar* opname, IROp op,
Bool invertG
nameXMMReg(gregOfRexRM(pfx,rm)) );
return delta+1;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,rm),
binop(op, gpart,
loadLE(Ity_V128, mkexpr(addr))) );
/* All lanes SSE binary operation, G = G `op` E. */
static
-ULong dis_SSE_E_to_G_all ( Prefix pfx, Long delta,
+ULong dis_SSE_E_to_G_all ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, IROp op )
{
- return dis_SSE_E_to_G_all_wrk( pfx, delta, opname, op, False );
+ return dis_SSE_E_to_G_all_wrk( vbi, pfx, delta, opname, op, False );
}
/* All lanes SSE binary operation, G = (not G) `op` E. */
static
-ULong dis_SSE_E_to_G_all_invG ( Prefix pfx, Long delta,
+ULong dis_SSE_E_to_G_all_invG ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, IROp op )
{
- return dis_SSE_E_to_G_all_wrk( pfx, delta, opname, op, True );
+ return dis_SSE_E_to_G_all_wrk( vbi, pfx, delta, opname, op, True );
}
/* Lowest 32-bit lane only SSE binary operation, G = G `op` E. */
-static ULong dis_SSE_E_to_G_lo32 ( Prefix pfx, Long delta,
+static ULong dis_SSE_E_to_G_lo32 ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, IROp op )
{
HChar dis_buf[50];
/* We can only do a 32-bit memory read, so the upper 3/4 of the
E operand needs to be made simply of zeroes. */
IRTemp epart = newTemp(Ity_V128);
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( epart, unop( Iop_32UtoV128,
loadLE(Ity_I32, mkexpr(addr))) );
putXMMReg( gregOfRexRM(pfx,rm),
/* Lower 64-bit lane only SSE binary operation, G = G `op` E. */
-static ULong dis_SSE_E_to_G_lo64 ( Prefix pfx, Long delta,
+static ULong dis_SSE_E_to_G_lo64 ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, IROp op )
{
HChar dis_buf[50];
/* We can only do a 64-bit memory read, so the upper half of the
E operand needs to be made simply of zeroes. */
IRTemp epart = newTemp(Ity_V128);
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( epart, unop( Iop_64UtoV128,
loadLE(Ity_I64, mkexpr(addr))) );
putXMMReg( gregOfRexRM(pfx,rm),
/* All lanes unary SSE operation, G = op(E). */
static ULong dis_SSE_E_to_G_unary_all (
+ VexAbiInfo* vbi,
Prefix pfx, Long delta,
HChar* opname, IROp op
)
nameXMMReg(gregOfRexRM(pfx,rm)) );
return delta+1;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,rm),
unop(op, loadLE(Ity_V128, mkexpr(addr))) );
DIP("%s %s,%s\n", opname,
/* Lowest 32-bit lane only unary SSE operation, G = op(E). */
static ULong dis_SSE_E_to_G_unary_lo32 (
+ VexAbiInfo* vbi,
Prefix pfx, Long delta,
HChar* opname, IROp op
)
nameXMMReg(gregOfRexRM(pfx,rm)) );
return delta+1;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( oldG1,
binop( Iop_SetV128lo32,
mkexpr(oldG0),
/* Lowest 64-bit lane only unary SSE operation, G = op(E). */
static ULong dis_SSE_E_to_G_unary_lo64 (
+ VexAbiInfo* vbi,
Prefix pfx, Long delta,
HChar* opname, IROp op
)
nameXMMReg(gregOfRexRM(pfx,rm)) );
return delta+1;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( oldG1,
binop( Iop_SetV128lo64,
mkexpr(oldG0),
G = E `op` G (eLeft == True)
*/
static ULong dis_SSEint_E_to_G(
+ VexAbiInfo* vbi,
Prefix pfx, Long delta,
HChar* opname, IROp op,
Bool eLeft
nameXMMReg(gregOfRexRM(pfx,rm)) );
delta += 1;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
epart = loadLE(Ity_V128, mkexpr(addr));
DIP("%s %s,%s\n", opname,
dis_buf,
/* Handles SSE 32F/64F comparisons. */
-static ULong dis_SSEcmp_E_to_G ( Prefix pfx, Long delta,
+static ULong dis_SSEcmp_E_to_G ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, Bool all_lanes, Int sz )
{
HChar dis_buf[50];
nameXMMReg(eregOfRexRM(pfx,rm)),
nameXMMReg(gregOfRexRM(pfx,rm)) );
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 1 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 );
imm8 = getUChar(delta+alen);
findSSECmpOp(&needNot, &op, imm8, all_lanes, sz);
assign( plain,
/* Vector by scalar shift of G by the amount specified at the bottom
of E. */
-static ULong dis_SSE_shiftG_byE ( Prefix pfx, Long delta,
+static ULong dis_SSE_shiftG_byE ( VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
HChar* opname, IROp op )
{
HChar dis_buf[50];
nameXMMReg(gregOfRexRM(pfx,rm)) );
delta++;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( amt, loadLE(Ity_I32, mkexpr(addr)) );
DIP("%s %s,%s\n", opname,
dis_buf,
void* callback_opaque,
Long delta64,
VexArchInfo* archinfo,
- VexAbiInfo* vmi
+ VexAbiInfo* vbi
)
{
IRType ty;
above. */
vassert(!(pfx & PFX_REXW));
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
DIP("fxsave %s\n", dis_buf);
/* 0F 58 = ADDPS -- add 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x58) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "addps", Iop_Add32Fx4 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "addps", Iop_Add32Fx4 );
goto decode_success;
}
/* F3 0F 58 = ADDSS -- add 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x58) {
- delta = dis_SSE_E_to_G_lo32( pfx, delta+2, "addss", Iop_Add32F0x4 );
+ delta = dis_SSE_E_to_G_lo32( vbi, pfx, delta+2, "addss", Iop_Add32F0x4 );
goto decode_success;
}
/* 0F 55 = ANDNPS -- G = (not G) and E */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x55) {
- delta = dis_SSE_E_to_G_all_invG( pfx, delta+2, "andnps", Iop_AndV128 );
+ delta = dis_SSE_E_to_G_all_invG( vbi, pfx, delta+2, "andnps", Iop_AndV128 );
goto decode_success;
}
/* 0F 54 = ANDPS -- G = G and E */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x54) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "andps", Iop_AndV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "andps", Iop_AndV128 );
goto decode_success;
}
/* 0F C2 = CMPPS -- 32Fx4 comparison from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0xC2) {
- delta = dis_SSEcmp_E_to_G( pfx, delta+2, "cmpps", True, 4 );
+ delta = dis_SSEcmp_E_to_G( vbi, pfx, delta+2, "cmpps", True, 4 );
goto decode_success;
}
/* F3 0F C2 = CMPSS -- 32F0x4 comparison from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0xC2) {
- delta = dis_SSEcmp_E_to_G( pfx, delta+2, "cmpss", False, 4 );
+ delta = dis_SSEcmp_E_to_G( vbi, pfx, delta+2, "cmpss", False, 4 );
goto decode_success;
}
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)) );
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( argR, loadLE(Ity_F32, mkexpr(addr)) );
delta += 2+alen;
DIP("%scomiss %s,%s\n", insn[1]==0x2E ? "u" : "",
DIP("cvtpi2ps %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtpi2ps %s,%s\n", dis_buf,
DIP("cvtsi2ss %s,%s\n", nameIReg32(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg32, loadLE(Ity_I32, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtsi2ss %s,%s\n", dis_buf,
DIP("cvtsi2ssq %s,%s\n", nameIReg64(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtsi2ssq %s,%s\n", dis_buf,
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign(f32lo, loadLE(Ity_F32, mkexpr(addr)));
assign(f32hi, loadLE(Ity_F32, binop( Iop_Add64,
mkexpr(addr),
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameIReg(sz, gregOfRexRM(pfx,modrm), False));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign(f32lo, loadLE(Ity_F32, mkexpr(addr)));
delta += 2+alen;
DIP("cvt%sss2si %s,%s\n", r2zero ? "t" : "",
/* 0F 5E = DIVPS -- div 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5E) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "divps", Iop_Div32Fx4 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "divps", Iop_Div32Fx4 );
goto decode_success;
}
/* F3 0F 5E = DIVSS -- div 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5E) {
- delta = dis_SSE_E_to_G_lo32( pfx, delta+2, "divss", Iop_Div32F0x4 );
+ delta = dis_SSE_E_to_G_lo32( vbi, pfx, delta+2, "divss", Iop_Div32F0x4 );
goto decode_success;
}
IRTemp ew = newTemp(Ity_I32);
vassert(sz == 4);
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
DIP("ldmxcsr %s\n", dis_buf);
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0xF7) {
Bool ok = False;
- delta = dis_MMX( &ok, pfx, sz, delta+1 );
+ delta = dis_MMX( &ok, vbi, pfx, sz, delta+1 );
if (!ok)
goto decode_failure;
goto decode_success;
/* 0F 5F = MAXPS -- max 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5F) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "maxps", Iop_Max32Fx4 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "maxps", Iop_Max32Fx4 );
goto decode_success;
}
/* F3 0F 5F = MAXSS -- max 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5F) {
- delta = dis_SSE_E_to_G_lo32( pfx, delta+2, "maxss", Iop_Max32F0x4 );
+ delta = dis_SSE_E_to_G_lo32( vbi, pfx, delta+2, "maxss", Iop_Max32F0x4 );
goto decode_success;
}
/* 0F 5D = MINPS -- min 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5D) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "minps", Iop_Min32Fx4 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "minps", Iop_Min32Fx4 );
goto decode_success;
}
/* F3 0F 5D = MINSS -- min 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5D) {
- delta = dis_SSE_E_to_G_lo32( pfx, delta+2, "minss", Iop_Min32F0x4 );
+ delta = dis_SSE_E_to_G_lo32( vbi, pfx, delta+2, "minss", Iop_Min32F0x4 );
goto decode_success;
}
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,modrm),
loadLE(Ity_V128, mkexpr(addr)) );
DIP("mov[ua]ps %s,%s\n", dis_buf,
if (epartIsReg(modrm)) {
/* fall through; awaiting test case */
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
DIP("mov[ua]ps %s,%s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
dis_buf );
DIP("movhps %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
putXMMRegLane64( gregOfRexRM(pfx,modrm), 1/*upper lane*/,
loadLE(Ity_I64, mkexpr(addr)) );
&& insn[0] == 0x0F && insn[1] == 0x17) {
if (!epartIsReg(insn[2])) {
delta += 2;
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
storeLE( mkexpr(addr),
getXMMRegLane64( gregOfRexRM(pfx,insn[2]),
DIP("movhlps %s, %s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
putXMMRegLane64( gregOfRexRM(pfx,modrm), 0/*lower lane*/,
loadLE(Ity_I64, mkexpr(addr)) );
&& insn[0] == 0x0F && insn[1] == 0x13) {
if (!epartIsReg(insn[2])) {
delta += 2;
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
storeLE( mkexpr(addr),
getXMMRegLane64( gregOfRexRM(pfx,insn[2]),
&& insn[0] == 0x0F && insn[1] == 0x2B) {
modrm = getUChar(delta+2);
if (!epartIsReg(modrm)) {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
DIP("movntp%s %s,%s\n", sz==2 ? "d" : "s",
dis_buf,
modrm = getUChar(delta+2);
if (!epartIsReg(modrm)) {
/* do_MMX_preamble(); Intel docs don't specify this */
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr), getMMXReg(gregLO3ofRM(modrm)) );
DIP("movntq %s,%s\n", dis_buf,
nameMMXReg(gregLO3ofRM(modrm)));
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,modrm), mkV128(0) );
putXMMRegLane32( gregOfRexRM(pfx,modrm), 0,
loadLE(Ity_I32, mkexpr(addr)) );
if (epartIsReg(modrm)) {
/* fall through, we don't yet have a test case */
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr),
getXMMRegLane32(gregOfRexRM(pfx,modrm), 0) );
DIP("movss %s,%s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
/* 0F 59 = MULPS -- mul 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x59) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "mulps", Iop_Mul32Fx4 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "mulps", Iop_Mul32Fx4 );
goto decode_success;
}
/* F3 0F 59 = MULSS -- mul 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x59) {
- delta = dis_SSE_E_to_G_lo32( pfx, delta+2, "mulss", Iop_Mul32F0x4 );
+ delta = dis_SSE_E_to_G_lo32( vbi, pfx, delta+2, "mulss", Iop_Mul32F0x4 );
goto decode_success;
}
/* 0F 56 = ORPS -- G = G and E */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x56) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "orps", Iop_OrV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "orps", Iop_OrV128 );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xE0) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pavgb", False );
+ vbi, pfx, delta+2, insn[1], "pavgb", False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xE3) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pavgw", False );
+ vbi, pfx, delta+2, insn[1], "pavgw", False );
goto decode_success;
}
nameIReg16(eregOfRexRM(pfx,modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 1 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 1 );
delta += 3+alen;
lane = insn[3+alen-1];
assign(t4, loadLE(Ity_I16, mkexpr(addr)));
&& insn[0] == 0x0F && insn[1] == 0xEE) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pmaxsw", False );
+ vbi, pfx, delta+2, insn[1], "pmaxsw", False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xDE) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pmaxub", False );
+ vbi, pfx, delta+2, insn[1], "pmaxub", False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xEA) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pminsw", False );
+ vbi, pfx, delta+2, insn[1], "pminsw", False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xDA) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pminub", False );
+ vbi, pfx, delta+2, insn[1], "pminub", False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xE4) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "pmuluh", False );
+ vbi, pfx, delta+2, insn[1], "pmuluh", False );
goto decode_success;
}
modrm = getUChar(delta+2);
vassert(!epartIsReg(modrm));
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
switch (gregLO3ofRM(modrm)) {
&& insn[0] == 0x0F && insn[1] == 0xF6) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "psadbw", False );
+ vbi, pfx, delta+2, insn[1], "psadbw", False );
goto decode_success;
}
nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf,
1/*extra byte after amode*/ );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
order = (Int)insn[2+alen];
/* 0F 53 = RCPPS -- approx reciprocal 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x53) {
- delta = dis_SSE_E_to_G_unary_all( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_all( vbi, pfx, delta+2,
"rcpps", Iop_Recip32Fx4 );
goto decode_success;
}
/* F3 0F 53 = RCPSS -- approx reciprocal 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x53) {
- delta = dis_SSE_E_to_G_unary_lo32( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_lo32( vbi, pfx, delta+2,
"rcpss", Iop_Recip32F0x4 );
goto decode_success;
}
/* 0F 52 = RSQRTPS -- approx reciprocal sqrt 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x52) {
- delta = dis_SSE_E_to_G_unary_all( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_all( vbi, pfx, delta+2,
"rsqrtps", Iop_RSqrt32Fx4 );
goto decode_success;
}
/* F3 0F 52 = RSQRTSS -- approx reciprocal sqrt 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x52) {
- delta = dis_SSE_E_to_G_unary_lo32( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_lo32( vbi, pfx, delta+2,
"rsqrtss", Iop_RSqrt32F0x4 );
goto decode_success;
}
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf,
1/*byte at end of insn*/ );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
select = (Int)insn[2+alen];
/* 0F 51 = SQRTPS -- approx sqrt 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x51) {
- delta = dis_SSE_E_to_G_unary_all( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_all( vbi, pfx, delta+2,
"sqrtps", Iop_Sqrt32Fx4 );
goto decode_success;
}
/* F3 0F 51 = SQRTSS -- approx sqrt 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x51) {
- delta = dis_SSE_E_to_G_unary_lo32( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_lo32( vbi, pfx, delta+2,
"sqrtss", Iop_Sqrt32F0x4 );
goto decode_success;
}
&& !epartIsReg(insn[2]) && gregLO3ofRM(insn[2]) == 3) {
vassert(sz == 4);
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
/* Fake up a native SSE mxcsr word. The only thing it depends
/* 0F 5C = SUBPS -- sub 32Fx4 from R/M to R */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5C) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "subps", Iop_Sub32Fx4 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "subps", Iop_Sub32Fx4 );
goto decode_success;
}
/* F3 0F 5C = SUBSS -- sub 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5C) {
- delta = dis_SSE_E_to_G_lo32( pfx, delta+2, "subss", Iop_Sub32F0x4 );
+ delta = dis_SSE_E_to_G_lo32( vbi, pfx, delta+2, "subss", Iop_Sub32F0x4 );
goto decode_success;
}
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("unpck%sps %s,%s\n", hi ? "h" : "l",
/* 0F 57 = XORPS -- G = G and E */
if (haveNo66noF2noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x57) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "xorps", Iop_XorV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "xorps", Iop_XorV128 );
goto decode_success;
}
if (have66noF2noF3(pfx)
&& (sz == 2 || /* ignore redundant REX.W */ sz == 8)
&& insn[0] == 0x0F && insn[1] == 0x58) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "addpd", Iop_Add64Fx2 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "addpd", Iop_Add64Fx2 );
goto decode_success;
}
if (haveF2no66noF3(pfx)
&& (sz == 4 || /* ignore redundant REX.W */ sz == 8)
&& insn[0] == 0x0F && insn[1] == 0x58) {
- delta = dis_SSE_E_to_G_lo64( pfx, delta+2, "addsd", Iop_Add64F0x2 );
+ delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta+2, "addsd", Iop_Add64F0x2 );
goto decode_success;
}
/* 66 0F 55 = ANDNPD -- G = (not G) and E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x55) {
- delta = dis_SSE_E_to_G_all_invG( pfx, delta+2, "andnpd", Iop_AndV128 );
+ delta = dis_SSE_E_to_G_all_invG( vbi, pfx, delta+2, "andnpd", Iop_AndV128 );
goto decode_success;
}
/* 66 0F 54 = ANDPD -- G = G and E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x54) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "andpd", Iop_AndV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "andpd", Iop_AndV128 );
goto decode_success;
}
/* 66 0F C2 = CMPPD -- 64Fx2 comparison from R/M to R */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xC2) {
- delta = dis_SSEcmp_E_to_G( pfx, delta+2, "cmppd", True, 8 );
+ delta = dis_SSEcmp_E_to_G( vbi, pfx, delta+2, "cmppd", True, 8 );
goto decode_success;
}
/* F2 0F C2 = CMPSD -- 64F0x2 comparison from R/M to R */
if (haveF2no66noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0xC2) {
- delta = dis_SSEcmp_E_to_G( pfx, delta+2, "cmpsd", False, 8 );
+ delta = dis_SSEcmp_E_to_G( vbi, pfx, delta+2, "cmpsd", False, 8 );
goto decode_success;
}
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)) );
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( argR, loadLE(Ity_F64, mkexpr(addr)) );
delta += 2+alen;
DIP("%scomisd %s,%s\n", insn[1]==0x2E ? "u" : "",
DIP("cvtdq2pd %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtdq2pd %s,%s\n", dis_buf,
DIP("cvtdq2ps %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtdq2ps %s,%s\n", dis_buf,
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("cvt%spd2dq %s,%s\n", r2zero ? "t" : "",
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign(f64lo, loadLE(Ity_F64, mkexpr(addr)));
assign(f64hi, loadLE(Ity_F64, binop( Iop_Add64,
mkexpr(addr),
DIP("cvtpd2ps %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtpd2ps %s,%s\n", dis_buf,
DIP("cvtpi2pd %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtpi2pd %s,%s\n", dis_buf,
DIP("cvtps2dq %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtps2dq %s,%s\n", dis_buf,
DIP("cvtps2pd %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( f32lo, loadLE(Ity_F32, mkexpr(addr)) );
assign( f32hi, loadLE(Ity_F32,
binop(Iop_Add64,mkexpr(addr),mkU64(4))) );
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameIReg(sz, gregOfRexRM(pfx,modrm), False));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign(f64lo, loadLE(Ity_F64, mkexpr(addr)));
delta += 2+alen;
DIP("cvt%ssd2si %s,%s\n", r2zero ? "t" : "",
DIP("cvtsd2ss %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign(f64lo, loadLE(Ity_F64, mkexpr(addr)));
delta += 2+alen;
DIP("cvtsd2ss %s,%s\n", dis_buf,
DIP("cvtsi2sd %s,%s\n", nameIReg32(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg32, loadLE(Ity_I32, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtsi2sd %s,%s\n", dis_buf,
DIP("cvtsi2sdq %s,%s\n", nameIReg64(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
delta += 2+alen;
DIP("cvtsi2sdq %s,%s\n", dis_buf,
DIP("cvtss2sd %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign(f32lo, loadLE(Ity_F32, mkexpr(addr)));
delta += 2+alen;
DIP("cvtss2sd %s,%s\n", dis_buf,
/* 66 0F 5E = DIVPD -- div 64Fx2 from R/M to R */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x5E) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "divpd", Iop_Div64Fx2 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "divpd", Iop_Div64Fx2 );
goto decode_success;
}
/* F2 0F 5E = DIVSD -- div 64F0x2 from R/M to R */
if (haveF2no66noF3(pfx) && insn[0] == 0x0F && insn[1] == 0x5E) {
vassert(sz == 4);
- delta = dis_SSE_E_to_G_lo64( pfx, delta+2, "divsd", Iop_Div64F0x2 );
+ delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta+2, "divsd", Iop_Div64F0x2 );
goto decode_success;
}
/* 66 0F 5F = MAXPD -- max 64Fx2 from R/M to R */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x5F) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "maxpd", Iop_Max64Fx2 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "maxpd", Iop_Max64Fx2 );
goto decode_success;
}
/* F2 0F 5F = MAXSD -- max 64F0x2 from R/M to R */
if (haveF2no66noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5F) {
- delta = dis_SSE_E_to_G_lo64( pfx, delta+2, "maxsd", Iop_Max64F0x2 );
+ delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta+2, "maxsd", Iop_Max64F0x2 );
goto decode_success;
}
/* 66 0F 5D = MINPD -- min 64Fx2 from R/M to R */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x5D) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "minpd", Iop_Min64Fx2 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "minpd", Iop_Min64Fx2 );
goto decode_success;
}
/* F2 0F 5D = MINSD -- min 64F0x2 from R/M to R */
if (haveF2no66noF3(pfx) && sz == 4
&& insn[0] == 0x0F && insn[1] == 0x5D) {
- delta = dis_SSE_E_to_G_lo64( pfx, delta+2, "minsd", Iop_Min64F0x2 );
+ delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta+2, "minsd", Iop_Min64F0x2 );
goto decode_success;
}
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,modrm),
loadLE(Ity_V128, mkexpr(addr)) );
DIP("mov%s %s,%s\n", wot, dis_buf,
if (epartIsReg(modrm)) {
/* fall through; awaiting test case */
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
DIP("mov[ua]pd %s,%s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
dis_buf );
nameXMMReg(gregOfRexRM(pfx,modrm)));
}
} else {
- addr = disAMode( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
putXMMReg(
gregOfRexRM(pfx,modrm),
nameIReg64(eregOfRexRM(pfx,modrm)));
}
} else {
- addr = disAMode( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
storeLE( mkexpr(addr),
sz == 4
DIP("movdqa %s, %s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
nameXMMReg(eregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
DIP("movdqa %s, %s\n", nameXMMReg(gregOfRexRM(pfx,modrm)), dis_buf);
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,modrm),
loadLE(Ity_V128, mkexpr(addr)) );
DIP("movdqu %s,%s\n", dis_buf,
DIP("movdqu %s, %s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
nameXMMReg(eregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
DIP("movdqu %s, %s\n", nameXMMReg(gregOfRexRM(pfx,modrm)), dis_buf);
if (epartIsReg(modrm)) {
/* fall through; apparently reg-reg is not possible */
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
putXMMRegLane64( gregOfRexRM(pfx,modrm), 1/*upper lane*/,
loadLE(Ity_I64, mkexpr(addr)) );
if (have66noF2noF3(pfx) && insn[0] == 0x0F && insn[1] == 0x17) {
if (!epartIsReg(insn[2])) {
delta += 2;
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
storeLE( mkexpr(addr),
getXMMRegLane64( gregOfRexRM(pfx,insn[2]),
if (epartIsReg(modrm)) {
/* fall through; apparently reg-reg is not possible */
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
putXMMRegLane64( gregOfRexRM(pfx,modrm),
0/*lower lane*/,
if (have66noF2noF3(pfx) && insn[0] == 0x0F && insn[1] == 0x13) {
modrm = getUChar(delta+2);
if (!epartIsReg(modrm)) {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
storeLE( mkexpr(addr),
getXMMRegLane64( gregOfRexRM(pfx,modrm),
IRTemp newdata = newTemp(Ity_V128);
addr = newTemp(Ity_I64);
- assign( addr, handleAddrOverrides( pfx, getIReg64(R_RDI) ));
+ assign( addr, handleAddrOverrides( vbi, pfx, getIReg64(R_RDI) ));
assign( regD, getXMMReg( gregOfRexRM(pfx,modrm) ));
/* Unfortunately can't do the obvious thing with SarN8x16
&& insn[0] == 0x0F && insn[1] == 0xE7) {
modrm = getUChar(delta+2);
if (!epartIsReg(modrm)) {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
DIP("movntdq %s,%s\n", dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
vassert(sz == 4 || sz == 8);
modrm = getUChar(delta+2);
if (!epartIsReg(modrm)) {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr), getIRegG(sz, pfx, modrm) );
DIP("movnti %s,%s\n", dis_buf,
nameIRegG(sz, pfx, modrm));
/* fall through, awaiting test case */
/* dst: lo half copied, hi half zeroed */
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr),
getXMMRegLane64( gregOfRexRM(pfx,modrm), 0 ));
DIP("movq %s,%s\n", nameXMMReg(gregOfRexRM(pfx,modrm)), dis_buf );
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,modrm), mkV128(0) );
putXMMRegLane64( gregOfRexRM(pfx,modrm), 0,
loadLE(Ity_I64, mkexpr(addr)) );
nameXMMReg(eregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
storeLE( mkexpr(addr),
getXMMRegLane64(gregOfRexRM(pfx,modrm), 0) );
DIP("movsd %s,%s\n", nameXMMReg(gregOfRexRM(pfx,modrm)),
if (have66noF2noF3(pfx)
&& (sz == 2 || /* ignore redundant REX.W */ sz == 8)
&& insn[0] == 0x0F && insn[1] == 0x59) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "mulpd", Iop_Mul64Fx2 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "mulpd", Iop_Mul64Fx2 );
goto decode_success;
}
if (haveF2no66noF3(pfx)
&& (sz == 4 || /* ignore redundant REX.W */ sz == 8)
&& insn[0] == 0x0F && insn[1] == 0x59) {
- delta = dis_SSE_E_to_G_lo64( pfx, delta+2, "mulsd", Iop_Mul64F0x2 );
+ delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta+2, "mulsd", Iop_Mul64F0x2 );
goto decode_success;
}
/* 66 0F 56 = ORPD -- G = G and E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x56) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "orpd", Iop_OrV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "orpd", Iop_OrV128 );
goto decode_success;
}
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 1 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 1 );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
select = (Int)insn[2+alen];
delta += 3+alen;
/* 66 0F 51 = SQRTPD -- approx sqrt 64Fx2 from R/M to R */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x51) {
- delta = dis_SSE_E_to_G_unary_all( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_all( vbi, pfx, delta+2,
"sqrtpd", Iop_Sqrt64Fx2 );
goto decode_success;
}
/* F2 0F 51 = SQRTSD -- approx sqrt 64F0x2 from R/M to R */
if (haveF2no66noF3(pfx) && insn[0] == 0x0F && insn[1] == 0x51) {
vassert(sz == 4);
- delta = dis_SSE_E_to_G_unary_lo64( pfx, delta+2,
+ delta = dis_SSE_E_to_G_unary_lo64( vbi, pfx, delta+2,
"sqrtsd", Iop_Sqrt64F0x2 );
goto decode_success;
}
/* 66 0F 5C = SUBPD -- sub 64Fx2 from R/M to R */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x5C) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "subpd", Iop_Sub64Fx2 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "subpd", Iop_Sub64Fx2 );
goto decode_success;
}
if (haveF2no66noF3(pfx)
&& (sz == 4 || /* ignore redundant REX.W */ sz == 8)
&& insn[0] == 0x0F && insn[1] == 0x5C) {
- delta = dis_SSE_E_to_G_lo64( pfx, delta+2, "subsd", Iop_Sub64F0x2 );
+ delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta+2, "subsd", Iop_Sub64F0x2 );
goto decode_success;
}
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("unpck%sps %s,%s\n", hi ? "h" : "l",
/* 66 0F 57 = XORPD -- G = G xor E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x57) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "xorpd", Iop_XorV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "xorpd", Iop_XorV128 );
goto decode_success;
}
/* 66 0F 6B = PACKSSDW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x6B) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"packssdw", Iop_QNarrow32Sx4, True );
goto decode_success;
}
/* 66 0F 63 = PACKSSWB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x63) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"packsswb", Iop_QNarrow16Sx8, True );
goto decode_success;
}
/* 66 0F 67 = PACKUSWB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x67) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"packuswb", Iop_QNarrow16Ux8, True );
goto decode_success;
}
/* 66 0F FC = PADDB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xFC) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddb", Iop_Add8x16, False );
goto decode_success;
}
/* 66 0F FE = PADDD */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xFE) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddd", Iop_Add32x4, False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xD4) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "paddq", False );
+ vbi, pfx, delta+2, insn[1], "paddq", False );
goto decode_success;
}
/* 66 0F D4 = PADDQ */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD4) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddq", Iop_Add64x2, False );
goto decode_success;
}
/* 66 0F FD = PADDW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xFD) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddw", Iop_Add16x8, False );
goto decode_success;
}
/* 66 0F EC = PADDSB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xEC) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddsb", Iop_QAdd8Sx16, False );
goto decode_success;
}
/* 66 0F ED = PADDSW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xED) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddsw", Iop_QAdd16Sx8, False );
goto decode_success;
}
/* 66 0F DC = PADDUSB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xDC) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddusb", Iop_QAdd8Ux16, False );
goto decode_success;
}
/* 66 0F DD = PADDUSW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xDD) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"paddusw", Iop_QAdd16Ux8, False );
goto decode_success;
}
/* 66 0F DB = PAND */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xDB) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "pand", Iop_AndV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "pand", Iop_AndV128 );
goto decode_success;
}
/* 66 0F DF = PANDN */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xDF) {
- delta = dis_SSE_E_to_G_all_invG( pfx, delta+2, "pandn", Iop_AndV128 );
+ delta = dis_SSE_E_to_G_all_invG( vbi, pfx, delta+2, "pandn", Iop_AndV128 );
goto decode_success;
}
/* 66 0F E0 = PAVGB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE0) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pavgb", Iop_Avg8Ux16, False );
goto decode_success;
}
/* 66 0F E3 = PAVGW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE3) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pavgw", Iop_Avg16Ux8, False );
goto decode_success;
}
/* 66 0F 74 = PCMPEQB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x74) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pcmpeqb", Iop_CmpEQ8x16, False );
goto decode_success;
}
/* 66 0F 76 = PCMPEQD */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x76) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pcmpeqd", Iop_CmpEQ32x4, False );
goto decode_success;
}
/* 66 0F 75 = PCMPEQW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x75) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pcmpeqw", Iop_CmpEQ16x8, False );
goto decode_success;
}
/* 66 0F 64 = PCMPGTB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x64) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pcmpgtb", Iop_CmpGT8Sx16, False );
goto decode_success;
}
/* 66 0F 66 = PCMPGTD */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x66) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pcmpgtd", Iop_CmpGT32Sx4, False );
goto decode_success;
}
/* 66 0F 65 = PCMPGTW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x65) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pcmpgtw", Iop_CmpGT16Sx8, False );
goto decode_success;
}
nameIReg16(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf,
1/*byte after the amode*/ );
delta += 3+alen;
lane = insn[3+alen-1];
DIP("pmaddwd %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( s1V, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("pmaddwd %s,%s\n", dis_buf,
/* 66 0F EE = PMAXSW -- 16x8 signed max */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xEE) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pmaxsw", Iop_Max16Sx8, False );
goto decode_success;
}
/* 66 0F DE = PMAXUB -- 8x16 unsigned max */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xDE) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pmaxub", Iop_Max8Ux16, False );
goto decode_success;
}
/* 66 0F EA = PMINSW -- 16x8 signed min */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xEA) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pminsw", Iop_Min16Sx8, False );
goto decode_success;
}
/* 66 0F DA = PMINUB -- 8x16 unsigned min */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xDA) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pminub", Iop_Min8Ux16, False );
goto decode_success;
}
/* 66 0F E4 = PMULHUW -- 16x8 hi-half of unsigned widening multiply */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE4) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pmulhuw", Iop_MulHi16Ux8, False );
goto decode_success;
}
/* 66 0F E5 = PMULHW -- 16x8 hi-half of signed widening multiply */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE5) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pmulhw", Iop_MulHi16Sx8, False );
goto decode_success;
}
/* 66 0F D5 = PMULHL -- 16x8 multiply */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD5) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"pmullw", Iop_Mul16x8, False );
goto decode_success;
}
DIP("pmuludq %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 2+alen;
DIP("pmuludq %s,%s\n", dis_buf,
DIP("pmuludq %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("pmuludq %s,%s\n", dis_buf,
/* 66 0F EB = POR */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xEB) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "por", Iop_OrV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "por", Iop_OrV128 );
goto decode_success;
}
DIP("psadbw %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( s1V, loadLE(Ity_V128, mkexpr(addr)) );
delta += 2+alen;
DIP("psadbw %s,%s\n", dis_buf,
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf,
1/*byte after the amode*/ );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
order = (Int)insn[2+alen];
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf,
1/*byte after the amode*/ );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
order = (Int)insn[2+alen];
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf,
1/*byte after the amode*/ );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
order = (Int)insn[2+alen];
/* 66 0F F2 = PSLLD by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xF2) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "pslld", Iop_ShlN32x4 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "pslld", Iop_ShlN32x4 );
goto decode_success;
}
/* 66 0F F3 = PSLLQ by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xF3) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psllq", Iop_ShlN64x2 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psllq", Iop_ShlN64x2 );
goto decode_success;
}
/* 66 0F F1 = PSLLW by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xF1) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psllw", Iop_ShlN16x8 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psllw", Iop_ShlN16x8 );
goto decode_success;
}
/* 66 0F E2 = PSRAD by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE2) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psrad", Iop_SarN32x4 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psrad", Iop_SarN32x4 );
goto decode_success;
}
/* 66 0F E1 = PSRAW by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE1) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psraw", Iop_SarN16x8 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psraw", Iop_SarN16x8 );
goto decode_success;
}
/* 66 0F D2 = PSRLD by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD2) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psrld", Iop_ShrN32x4 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psrld", Iop_ShrN32x4 );
goto decode_success;
}
/* 66 0F D3 = PSRLQ by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD3) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psrlq", Iop_ShrN64x2 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psrlq", Iop_ShrN64x2 );
goto decode_success;
}
/* 66 0F D1 = PSRLW by E */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD1) {
- delta = dis_SSE_shiftG_byE( pfx, delta+2, "psrlw", Iop_ShrN16x8 );
+ delta = dis_SSE_shiftG_byE( vbi, pfx, delta+2, "psrlw", Iop_ShrN16x8 );
goto decode_success;
}
/* 66 0F F8 = PSUBB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xF8) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubb", Iop_Sub8x16, False );
goto decode_success;
}
/* 66 0F FA = PSUBD */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xFA) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubd", Iop_Sub32x4, False );
goto decode_success;
}
&& insn[0] == 0x0F && insn[1] == 0xFB) {
do_MMX_preamble();
delta = dis_MMXop_regmem_to_reg (
- pfx, delta+2, insn[1], "psubq", False );
+ vbi, pfx, delta+2, insn[1], "psubq", False );
goto decode_success;
}
/* 66 0F FB = PSUBQ */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xFB) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubq", Iop_Sub64x2, False );
goto decode_success;
}
/* 66 0F F9 = PSUBW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xF9) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubw", Iop_Sub16x8, False );
goto decode_success;
}
/* 66 0F E8 = PSUBSB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE8) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubsb", Iop_QSub8Sx16, False );
goto decode_success;
}
/* 66 0F E9 = PSUBSW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xE9) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubsw", Iop_QSub16Sx8, False );
goto decode_success;
}
/* 66 0F D8 = PSUBSB */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD8) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubusb", Iop_QSub8Ux16, False );
goto decode_success;
}
/* 66 0F D9 = PSUBSW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xD9) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"psubusw", Iop_QSub16Ux8, False );
goto decode_success;
}
/* 66 0F 68 = PUNPCKHBW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x68) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpckhbw",
Iop_InterleaveHI8x16, True );
goto decode_success;
/* 66 0F 6A = PUNPCKHDQ */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x6A) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpckhdq",
Iop_InterleaveHI32x4, True );
goto decode_success;
/* 66 0F 6D = PUNPCKHQDQ */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x6D) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpckhqdq",
Iop_InterleaveHI64x2, True );
goto decode_success;
/* 66 0F 69 = PUNPCKHWD */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x69) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpckhwd",
Iop_InterleaveHI16x8, True );
goto decode_success;
/* 66 0F 60 = PUNPCKLBW */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x60) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpcklbw",
Iop_InterleaveLO8x16, True );
goto decode_success;
/* 66 0F 62 = PUNPCKLDQ */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x62) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpckldq",
Iop_InterleaveLO32x4, True );
goto decode_success;
/* 66 0F 6C = PUNPCKLQDQ */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x6C) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpcklqdq",
Iop_InterleaveLO64x2, True );
goto decode_success;
/* 66 0F 61 = PUNPCKLWD */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0x61) {
- delta = dis_SSEint_E_to_G( pfx, delta+2,
+ delta = dis_SSEint_E_to_G( vbi, pfx, delta+2,
"punpcklwd",
Iop_InterleaveLO16x8, True );
goto decode_success;
/* 66 0F EF = PXOR */
if (have66noF2noF3(pfx) && sz == 2
&& insn[0] == 0x0F && insn[1] == 0xEF) {
- delta = dis_SSE_E_to_G_all( pfx, delta+2, "pxor", Iop_XorV128 );
+ delta = dis_SSE_E_to_G_all( vbi, pfx, delta+2, "pxor", Iop_XorV128 );
goto decode_success;
}
inefficient. */
ULong lineszB = 256ULL;
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
delta += 2+alen;
/* Round addr down to the start of the containing block. */
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
DIP("movs%cdup %s,%s\n", isH ? 'h' : 'l',
dis_buf,
delta += 2+1;
assign ( d0, unop(Iop_V128to64, mkexpr(sV)) );
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( d0, loadLE(Ity_I64, mkexpr(addr)) );
DIP("movddup %s,%s\n", dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
DIP("addsubps %s,%s\n", dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
DIP("addsubpd %s,%s\n", dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
DIP("h%sps %s,%s\n", str, dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 2+1;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
DIP("h%spd %s,%s\n", str, dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
if (epartIsReg(modrm)) {
goto decode_failure;
} else {
- addr = disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+2, dis_buf, 0 );
putXMMReg( gregOfRexRM(pfx,modrm),
loadLE(Ity_V128, mkexpr(addr)) );
DIP("lddqu %s,%s\n", dis_buf,
DIP("pmaddubsw %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 3+alen;
DIP("pmaddubsw %s,%s\n", dis_buf,
DIP("pmaddubsw %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 3+alen;
DIP("ph%s %s,%s\n", str, nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 3+alen;
DIP("ph%s %s,%s\n", str, dis_buf,
nameXMMReg(gregOfRexRM(pfx,modrm)));
delta += 3+1;
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
DIP("ph%s %s,%s\n", str, dis_buf,
DIP("pmulhrsw %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 3+alen;
DIP("pmulhrsw %s,%s\n", dis_buf,
DIP("pmulhrsw %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 3+alen;
DIP("psign%s %s,%s\n", str, nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 3+alen;
DIP("psign%s %s,%s\n", str, dis_buf,
DIP("psign%s %s,%s\n", str, nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 3+alen;
DIP("pabs%s %s,%s\n", str, nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 3+alen;
DIP("pabs%s %s,%s\n", str, dis_buf,
DIP("pabs%s %s,%s\n", str, nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 3+alen;
nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
d64 = (Long)insn[3+alen];
delta += 3+alen+1;
nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
d64 = (Long)insn[3+alen];
DIP("pshufb %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
nameMMXReg(gregLO3ofRM(modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
delta += 3+alen;
DIP("pshufb %s,%s\n", dis_buf,
DIP("pshufb %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
nameXMMReg(gregOfRexRM(pfx,modrm)));
} else {
- addr = disAMode ( &alen, pfx, delta+3, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta+3, dis_buf, 0 );
gen_SEGV_if_not_16_aligned( addr );
assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
delta += 3+alen;
if (have66orF2orF3(pfx)) goto decode_failure;
d64 = getUDisp16(delta);
delta += 2;
- dis_ret(vmi, d64);
+ dis_ret(vbi, d64);
dres.whatNext = Dis_StopHere;
DIP("ret %lld\n", d64);
break;
case 0xC3: /* RET */
if (have66orF2(pfx)) goto decode_failure;
/* F3 is acceptable on AMD. */
- dis_ret(vmi, 0);
+ dis_ret(vbi, 0);
dres.whatNext = Dis_StopHere;
DIP(haveF3(pfx) ? "rep ; ret\n" : "ret\n");
break;
storeLE( mkexpr(t1), mkU64(guest_RIP_bbstart+delta));
t2 = newTemp(Ity_I64);
assign(t2, mkU64((Addr64)d64));
- make_redzone_AbiHint(vmi, t1, t2/*nia*/, "call-d32");
+ make_redzone_AbiHint(vbi, t1, t2/*nia*/, "call-d32");
if (resteerOkFn( callback_opaque, (Addr64)d64) ) {
/* follow into the call target. */
dres.whatNext = Dis_Resteer;
&& haveNo66noF2noF3(pfx)) {
Long delta0 = delta;
Bool decode_OK = False;
- delta = dis_FPU ( &decode_OK, pfx, delta );
+ delta = dis_FPU ( &decode_OK, vbi, pfx, delta );
if (!decode_OK) {
delta = delta0;
goto decode_failure;
case 0x69: /* IMUL Iv, Ev, Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_imul_I_E_G ( pfx, sz, delta, sz );
+ delta = dis_imul_I_E_G ( vbi, pfx, sz, delta, sz );
break;
case 0x6B: /* IMUL Ib, Ev, Gv */
- delta = dis_imul_I_E_G ( pfx, sz, delta, 1 );
+ delta = dis_imul_I_E_G ( vbi, pfx, sz, delta, 1 );
break;
/* ------------------------ MOV ------------------------ */
case 0x88: /* MOV Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_mov_G_E(pfx, 1, delta);
+ delta = dis_mov_G_E(vbi, pfx, 1, delta);
break;
case 0x89: /* MOV Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_mov_G_E(pfx, sz, delta);
+ delta = dis_mov_G_E(vbi, pfx, sz, delta);
break;
case 0x8A: /* MOV Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_mov_E_G(pfx, 1, delta);
+ delta = dis_mov_E_G(vbi, pfx, 1, delta);
break;
case 0x8B: /* MOV Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_mov_E_G(pfx, sz, delta);
+ delta = dis_mov_E_G(vbi, pfx, sz, delta);
break;
case 0x8D: /* LEA M,Gv */
/* NOTE! this is the one place where a segment override prefix
has no effect on the address calculation. Therefore we clear
any segment override bits in pfx. */
- addr = disAMode ( &alen, clearSegBits(pfx), delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, clearSegBits(pfx), delta, dis_buf, 0 );
delta += alen;
/* This is a hack. But it isn't clear that really doing the
calculation at 32 bits is really worth it. Hence for leal,
delta += 8;
ty = szToITy(sz);
addr = newTemp(Ity_I64);
- assign( addr, handleAddrOverrides(pfx, mkU64(d64)) );
+ assign( addr, handleAddrOverrides(vbi, pfx, mkU64(d64)) );
putIRegRAX(sz, loadLE( ty, mkexpr(addr) ));
DIP("mov%c %s0x%llx, %s\n", nameISize(sz),
segRegTxt(pfx), d64,
delta += 8;
ty = szToITy(sz);
addr = newTemp(Ity_I64);
- assign( addr, handleAddrOverrides(pfx, mkU64(d64)) );
+ assign( addr, handleAddrOverrides(vbi, pfx, mkU64(d64)) );
storeLE( mkexpr(addr), getIRegRAX(sz) );
DIP("mov%c %s, %s0x%llx\n", nameISize(sz), nameIRegRAX(sz),
segRegTxt(pfx), d64);
(Long)d64,
nameIRegE(sz,pfx,modrm));
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf,
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf,
/*xtra*/imin(4,sz) );
delta += alen;
d64 = getSDisp(imin(4,sz),delta);
nameIRegG(8, pfx, modrm));
break;
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
putIRegG(8, pfx, modrm,
unop(Iop_32Sto64,
case 0x02: /* ADD Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Add8, True, 1, delta, "add" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Add8, True, 1, delta, "add" );
break;
case 0x03: /* ADD Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Add8, True, sz, delta, "add" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Add8, True, sz, delta, "add" );
break;
case 0x0A: /* OR Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Or8, True, 1, delta, "or" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Or8, True, 1, delta, "or" );
break;
case 0x0B: /* OR Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Or8, True, sz, delta, "or" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Or8, True, sz, delta, "or" );
break;
case 0x12: /* ADC Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, True, Iop_Add8, True, 1, delta, "adc" );
+ delta = dis_op2_E_G ( vbi, pfx, True, Iop_Add8, True, 1, delta, "adc" );
break;
case 0x13: /* ADC Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, True, Iop_Add8, True, sz, delta, "adc" );
+ delta = dis_op2_E_G ( vbi, pfx, True, Iop_Add8, True, sz, delta, "adc" );
break;
//.. //-- case 0x1A: /* SBB Eb,Gb */
//.. //-- break;
case 0x1B: /* SBB Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, True, Iop_Sub8, True, sz, delta, "sbb" );
+ delta = dis_op2_E_G ( vbi, pfx, True, Iop_Sub8, True, sz, delta, "sbb" );
break;
case 0x22: /* AND Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_And8, True, 1, delta, "and" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_And8, True, 1, delta, "and" );
break;
case 0x23: /* AND Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_And8, True, sz, delta, "and" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_And8, True, sz, delta, "and" );
break;
case 0x2A: /* SUB Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Sub8, True, 1, delta, "sub" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Sub8, True, 1, delta, "sub" );
break;
case 0x2B: /* SUB Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Sub8, True, sz, delta, "sub" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Sub8, True, sz, delta, "sub" );
break;
case 0x32: /* XOR Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Xor8, True, 1, delta, "xor" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Xor8, True, 1, delta, "xor" );
break;
case 0x33: /* XOR Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Xor8, True, sz, delta, "xor" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Xor8, True, sz, delta, "xor" );
break;
case 0x3A: /* CMP Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Sub8, False, 1, delta, "cmp" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Sub8, False, 1, delta, "cmp" );
break;
case 0x3B: /* CMP Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_Sub8, False, sz, delta, "cmp" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_Sub8, False, sz, delta, "cmp" );
break;
case 0x84: /* TEST Eb,Gb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_And8, False, 1, delta, "test" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_And8, False, 1, delta, "test" );
break;
case 0x85: /* TEST Ev,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_E_G ( pfx, False, Iop_And8, False, sz, delta, "test" );
+ delta = dis_op2_E_G ( vbi, pfx, False, Iop_And8, False, sz, delta, "test" );
break;
/* ------------------------ opl Gv, Ev ----------------- */
case 0x00: /* ADD Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Add8, True, 1, delta, "add" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Add8, True, 1, delta, "add" );
break;
case 0x01: /* ADD Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Add8, True, sz, delta, "add" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Add8, True, sz, delta, "add" );
break;
case 0x08: /* OR Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Or8, True, 1, delta, "or" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Or8, True, 1, delta, "or" );
break;
case 0x09: /* OR Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Or8, True, sz, delta, "or" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Or8, True, sz, delta, "or" );
break;
case 0x10: /* ADC Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, True, Iop_Add8, True, 1, delta, "adc" );
+ delta = dis_op2_G_E ( vbi, pfx, True, Iop_Add8, True, 1, delta, "adc" );
break;
case 0x11: /* ADC Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, True, Iop_Add8, True, sz, delta, "adc" );
+ delta = dis_op2_G_E ( vbi, pfx, True, Iop_Add8, True, sz, delta, "adc" );
break;
case 0x18: /* SBB Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, True, Iop_Sub8, True, 1, delta, "sbb" );
+ delta = dis_op2_G_E ( vbi, pfx, True, Iop_Sub8, True, 1, delta, "sbb" );
break;
case 0x19: /* SBB Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, True, Iop_Sub8, True, sz, delta, "sbb" );
+ delta = dis_op2_G_E ( vbi, pfx, True, Iop_Sub8, True, sz, delta, "sbb" );
break;
case 0x20: /* AND Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_And8, True, 1, delta, "and" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_And8, True, 1, delta, "and" );
break;
case 0x21: /* AND Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_And8, True, sz, delta, "and" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_And8, True, sz, delta, "and" );
break;
case 0x28: /* SUB Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Sub8, True, 1, delta, "sub" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Sub8, True, 1, delta, "sub" );
break;
case 0x29: /* SUB Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Sub8, True, sz, delta, "sub" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Sub8, True, sz, delta, "sub" );
break;
case 0x30: /* XOR Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Xor8, True, 1, delta, "xor" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Xor8, True, 1, delta, "xor" );
break;
case 0x31: /* XOR Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Xor8, True, sz, delta, "xor" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Xor8, True, sz, delta, "xor" );
break;
case 0x38: /* CMP Gb,Eb */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Sub8, False, 1, delta, "cmp" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Sub8, False, 1, delta, "cmp" );
break;
case 0x39: /* CMP Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_op2_G_E ( pfx, False, Iop_Sub8, False, sz, delta, "cmp" );
+ delta = dis_op2_G_E ( vbi, pfx, False, Iop_Sub8, False, sz, delta, "cmp" );
break;
/* ------------------------ POP ------------------------ */
after it increments the RSP register. */
putIReg64(R_RSP, binop(Iop_Add64, mkexpr(t1), mkU64(sz)) );
- addr = disAMode ( &len, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &len, vbi, pfx, delta, dis_buf, 0 );
storeLE( mkexpr(addr), mkexpr(t3) );
DIP("popl %s\n", dis_buf);
/* Because unlock_bus_after_insn is now True, generic logic
at the bottom of disInstr will add the
IRStmt_MBE(Imbe_BusUnlock). */
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( t1, loadLE(ty, mkexpr(addr)) );
assign( t2, getIRegG(sz, pfx, modrm) );
storeLE( mkexpr(addr), mkexpr(t2) );
sz = 1;
d_sz = 1;
d64 = getSDisp8(delta + am_sz);
- delta = dis_Grp1 ( pfx, delta, modrm, am_sz, d_sz, sz, d64 );
+ delta = dis_Grp1 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz, d64 );
break;
case 0x81: /* Grp1 Iv,Ev */
am_sz = lengthAMode(pfx,delta);
d_sz = imin(sz,4);
d64 = getSDisp(d_sz, delta + am_sz);
- delta = dis_Grp1 ( pfx, delta, modrm, am_sz, d_sz, sz, d64 );
+ delta = dis_Grp1 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz, d64 );
break;
case 0x83: /* Grp1 Ib,Ev */
am_sz = lengthAMode(pfx,delta);
d_sz = 1;
d64 = getSDisp8(delta + am_sz);
- delta = dis_Grp1 ( pfx, delta, modrm, am_sz, d_sz, sz, d64 );
+ delta = dis_Grp1 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz, d64 );
break;
/* ------------------------ (Grp2 extensions) ---------- */
d_sz = 1;
d64 = getUChar(delta + am_sz);
sz = 1;
- delta = dis_Grp2 ( pfx, delta, modrm, am_sz, d_sz, sz,
+ delta = dis_Grp2 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz,
mkU8(d64 & 0xFF), NULL, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
am_sz = lengthAMode(pfx,delta);
d_sz = 1;
d64 = getUChar(delta + am_sz);
- delta = dis_Grp2 ( pfx, delta, modrm, am_sz, d_sz, sz,
+ delta = dis_Grp2 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz,
mkU8(d64 & 0xFF), NULL, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
d_sz = 0;
d64 = 1;
sz = 1;
- delta = dis_Grp2 ( pfx, delta, modrm, am_sz, d_sz, sz,
+ delta = dis_Grp2 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz,
mkU8(d64), NULL, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
am_sz = lengthAMode(pfx,delta);
d_sz = 0;
d64 = 1;
- delta = dis_Grp2 ( pfx, delta, modrm, am_sz, d_sz, sz,
+ delta = dis_Grp2 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz,
mkU8(d64), NULL, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
am_sz = lengthAMode(pfx,delta);
d_sz = 0;
sz = 1;
- delta = dis_Grp2 ( pfx, delta, modrm, am_sz, d_sz, sz,
+ delta = dis_Grp2 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz,
getIRegCL(), "%cl", &decode_OK );
if (!decode_OK) goto decode_failure;
break;
modrm = getUChar(delta);
am_sz = lengthAMode(pfx,delta);
d_sz = 0;
- delta = dis_Grp2 ( pfx, delta, modrm, am_sz, d_sz, sz,
+ delta = dis_Grp2 ( vbi, pfx, delta, modrm, am_sz, d_sz, sz,
getIRegCL(), "%cl", &decode_OK );
if (!decode_OK) goto decode_failure;
break;
case 0xF6: { /* Grp3 Eb */
Bool decode_OK = True;
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_Grp3 ( pfx, 1, delta, &decode_OK );
+ delta = dis_Grp3 ( vbi, pfx, 1, delta, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
}
case 0xF7: { /* Grp3 Ev */
Bool decode_OK = True;
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_Grp3 ( pfx, sz, delta, &decode_OK );
+ delta = dis_Grp3 ( vbi, pfx, sz, delta, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
}
case 0xFE: { /* Grp4 Eb */
Bool decode_OK = True;
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_Grp4 ( pfx, delta, &decode_OK );
+ delta = dis_Grp4 ( vbi, pfx, delta, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
}
case 0xFF: { /* Grp5 Ev */
Bool decode_OK = True;
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_Grp5 ( vmi, pfx, sz, delta, &dres, &decode_OK );
+ delta = dis_Grp5 ( vbi, pfx, sz, delta, &dres, &decode_OK );
if (!decode_OK) goto decode_failure;
break;
}
modrm = getUChar(delta);
am_sz = lengthAMode(pfx,delta);
d64 = getSDisp8(delta + am_sz);
- delta = dis_Grp8_Imm ( pfx, delta, modrm, am_sz, sz, d64,
+ delta = dis_Grp8_Imm ( vbi, pfx, delta, modrm, am_sz, sz, d64,
&decode_OK );
if (!decode_OK)
goto decode_failure;
case 0xBC: /* BSF Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_bs_E_G ( pfx, sz, delta, True );
+ delta = dis_bs_E_G ( vbi, pfx, sz, delta, True );
break;
case 0xBD: /* BSR Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_bs_E_G ( pfx, sz, delta, False );
+ delta = dis_bs_E_G ( vbi, pfx, sz, delta, False );
break;
/* =-=-=-=-=-=-=-=-=- BSWAP -=-=-=-=-=-=-=-=-=-=-= */
case 0xA3: /* BT Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 8 && sz != 4 && sz != 2) goto decode_failure;
- delta = dis_bt_G_E ( pfx, sz, delta, BtOpNone );
+ delta = dis_bt_G_E ( vbi, pfx, sz, delta, BtOpNone );
break;
case 0xB3: /* BTR Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 8 && sz != 4 && sz != 2) goto decode_failure;
- delta = dis_bt_G_E ( pfx, sz, delta, BtOpReset );
+ delta = dis_bt_G_E ( vbi, pfx, sz, delta, BtOpReset );
break;
case 0xAB: /* BTS Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 8 && sz != 4 && sz != 2) goto decode_failure;
- delta = dis_bt_G_E ( pfx, sz, delta, BtOpSet );
+ delta = dis_bt_G_E ( vbi, pfx, sz, delta, BtOpSet );
break;
case 0xBB: /* BTC Gv,Ev */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 8 && sz != 4 && sz != 2) goto decode_failure;
- delta = dis_bt_G_E ( pfx, sz, delta, BtOpComp );
+ delta = dis_bt_G_E ( vbi, pfx, sz, delta, BtOpComp );
break;
/* =-=-=-=-=-=-=-=-=- CMOV =-=-=-=-=-=-=-=-=-=-=-= */
case 0x4E: /* CMOVLEb/CMOVNGb (cmov less or equal) */
case 0x4F: /* CMOVGb/CMOVNLEb (cmov greater) */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_cmov_E_G(pfx, sz, (AMD64Condcode)(opc - 0x40), delta);
+ delta = dis_cmov_E_G(vbi, pfx, sz, (AMD64Condcode)(opc - 0x40), delta);
break;
/* =-=-=-=-=-=-=-=-=- CMPXCHG -=-=-=-=-=-=-=-=-=-= */
case 0xB0: { /* CMPXCHG Gb,Eb */
Bool ok = True;
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_cmpxchg_G_E ( &ok, pfx, 1, delta );
+ delta = dis_cmpxchg_G_E ( &ok, vbi, pfx, 1, delta );
if (!ok) goto decode_failure;
break;
}
Bool ok = True;
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 2 && sz != 4 && sz != 8) goto decode_failure;
- delta = dis_cmpxchg_G_E ( &ok, pfx, sz, delta );
+ delta = dis_cmpxchg_G_E ( &ok, vbi, pfx, sz, delta );
if (!ok) goto decode_failure;
break;
}
Bool ok = True;
if (have66orF2orF3(pfx)) goto decode_failure;
if (sz != 4 && sz != 8) goto decode_failure;
- delta = dis_cmpxchg8b ( &ok, pfx, sz, delta );
+ delta = dis_cmpxchg8b ( &ok, vbi, pfx, sz, delta );
break;
}
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 2 && sz != 4 && sz != 8)
goto decode_failure;
- delta = dis_movx_E_G ( pfx, delta, 1, sz, False );
+ delta = dis_movx_E_G ( vbi, pfx, delta, 1, sz, False );
break;
case 0xB7: /* MOVZXw Ew,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 4 && sz != 8)
goto decode_failure;
- delta = dis_movx_E_G ( pfx, delta, 2, sz, False );
+ delta = dis_movx_E_G ( vbi, pfx, delta, 2, sz, False );
break;
case 0xBE: /* MOVSXb Eb,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 2 && sz != 4 && sz != 8)
goto decode_failure;
- delta = dis_movx_E_G ( pfx, delta, 1, sz, True );
+ delta = dis_movx_E_G ( vbi, pfx, delta, 1, sz, True );
break;
case 0xBF: /* MOVSXw Ew,Gv */
if (haveF2orF3(pfx)) goto decode_failure;
if (sz != 4 && sz != 8)
goto decode_failure;
- delta = dis_movx_E_G ( pfx, delta, 2, sz, True );
+ delta = dis_movx_E_G ( vbi, pfx, delta, 2, sz, True );
break;
//.. //-- /* =-=-=-=-=-=-=-=-=-=-= MOVNTI -=-=-=-=-=-=-=-=-= */
case 0xAF: /* IMUL Ev, Gv */
if (haveF2orF3(pfx)) goto decode_failure;
- delta = dis_mul_E_G ( pfx, sz, delta );
+ delta = dis_mul_E_G ( vbi, pfx, sz, delta );
break;
/* =-=-=-=-=-=-=-=-=- NOPs =-=-=-=-=-=-=-=-=-=-=-= */
if (haveF2orF3(pfx)) goto decode_failure;
modrm = getUChar(delta);
if (epartIsReg(modrm)) goto decode_failure;
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
DIP("nop%c %s\n", nameISize(sz), dis_buf);
break;
if (gregLO3ofRM(modrm) != 0 && gregLO3ofRM(modrm) != 1)
goto decode_failure;
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
switch (gregLO3ofRM(modrm)) {
DIP("set%s %s\n", name_AMD64Condcode(opc-0x90),
nameIRegE(1,pfx,modrm));
} else {
- addr = disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
storeLE( mkexpr(addr), mkexpr(t1) );
DIP("set%s %s\n", name_AMD64Condcode(opc-0x90), dis_buf);
d64 = delta + lengthAMode(pfx, delta);
vex_sprintf(dis_buf, "$%d", (Int)getUChar(d64));
delta = dis_SHLRD_Gv_Ev (
- pfx, delta, modrm, sz,
+ vbi, pfx, delta, modrm, sz,
mkU8(getUChar(d64)), True, /* literal */
dis_buf, True /* left */ );
break;
case 0xA5: /* SHLDv %cl,Gv,Ev */
modrm = getUChar(delta);
delta = dis_SHLRD_Gv_Ev (
- pfx, delta, modrm, sz,
+ vbi, pfx, delta, modrm, sz,
getIRegCL(), False, /* not literal */
"%cl", True /* left */ );
break;
d64 = delta + lengthAMode(pfx, delta);
vex_sprintf(dis_buf, "$%d", (Int)getUChar(d64));
delta = dis_SHLRD_Gv_Ev (
- pfx, delta, modrm, sz,
+ vbi, pfx, delta, modrm, sz,
mkU8(getUChar(d64)), True, /* literal */
dis_buf, False /* right */ );
break;
case 0xAD: /* SHRDv %cl,Gv,Ev */
modrm = getUChar(delta);
delta = dis_SHLRD_Gv_Ev (
- pfx, delta, modrm, sz,
+ vbi, pfx, delta, modrm, sz,
getIRegCL(), False, /* not literal */
"%cl", False /* right */);
break;
case 0xC0: { /* XADD Gb,Eb */
Bool decode_OK = False;
- delta = dis_xadd_G_E ( &decode_OK, pfx, 1, delta );
+ delta = dis_xadd_G_E ( &decode_OK, vbi, pfx, 1, delta );
if (!decode_OK)
goto decode_failure;
break;
}
case 0xC1: { /* XADD Gv,Ev */
Bool decode_OK = False;
- delta = dis_xadd_G_E ( &decode_OK, pfx, sz, delta );
+ delta = dis_xadd_G_E ( &decode_OK, vbi, pfx, sz, delta );
if (!decode_OK)
goto decode_failure;
break;
if (have66orF2orF3(pfx))
goto decode_failure;
- delta = dis_MMX ( &decode_OK, pfx, sz, delta-1 );
+ delta = dis_MMX ( &decode_OK, vbi, pfx, sz, delta-1 );
if (!decode_OK) {
delta = delta0;
goto decode_failure;
projects / thirdparty / valgrind.git / commitdiff
