drm/xe: Consolidate workaround entries for Wa_14021402888

Wa_14021402888 applies to all graphics versions from 20.01 through 30.05
(inclusive).  Consolidate the RTP entries into a single range-based
entry.

Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com>
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-13-b12005a05af6@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index f0c42be062146837e6ba40621af54fcafa34f8e8..5d71cb9dca513803274ec1d5b766c2cbb0c31987 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -376,6 +376,10 @@ static const struct xe_rtp_entry_sr engine_was[] = {
                             PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
                             XE_RTP_ACTION_FLAG(ENGINE_BASE)))
        },
+       { XE_RTP_NAME("14021402888"),
+         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 3005), ENGINE_CLASS(RENDER)),
+         XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
+       },
 
        /* TGL */
 
@@ -522,10 +526,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
          XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
          XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, SLM_WMTP_RESTORE))
        },
-       { XE_RTP_NAME("14021402888"),
-         XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
-         XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
-       },
        { XE_RTP_NAME("13012615864"),
          XE_RTP_RULES(GRAPHICS_VERSION(2004),
                       FUNC(xe_rtp_match_first_render_or_compute)),
@@ -550,10 +550,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
                       FUNC(xe_rtp_match_first_render_or_compute)),
          XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, WR_REQ_CHAINING_DIS))
        },
-       { XE_RTP_NAME("14021402888"),
-         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002), ENGINE_CLASS(RENDER)),
-         XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
-       },
        { XE_RTP_NAME("14021821874, 14022954250"),
          XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
                       FUNC(xe_rtp_match_first_render_or_compute)),
@@ -573,11 +569,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
 
        /* Xe3_LPG */
 
-       { XE_RTP_NAME("14021402888"),
-         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
-                      FUNC(xe_rtp_match_first_render_or_compute)),
-         XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
-       },
        { XE_RTP_NAME("18034896535"),
          XE_RTP_RULES(GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0),
                       FUNC(xe_rtp_match_first_render_or_compute)),
@@ -608,10 +599,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
          XE_RTP_ACTIONS(SET(RING_PSMI_CTL(0), RC_SEMA_IDLE_MSG_DISABLE,
                             XE_RTP_ACTION_FLAG(ENGINE_BASE)))
        },
-       { XE_RTP_NAME("14021402888"),
-         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3003, 3005), FUNC(xe_rtp_match_first_render_or_compute)),
-         XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
-       },
        { XE_RTP_NAME("18041344222"),
          XE_RTP_RULES(GRAPHICS_VERSION(3000),
                       FUNC(xe_rtp_match_first_render_or_compute),