video: tegra: parametrize PCLK and DE polarity

Configure pixel clock and data enable polarity according to panel flags.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>

diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h
index ab12cc9c7d0e6e49e1ae6633557afb7fd12746c4..22f8f977cc6a0b205b0a7f55d97e5ea2bbebce8d 100644 (file)
--- a/arch/arm/include/asm/arch-tegra/dc.h
+++ b/arch/arm/include/asm/arch-tegra/dc.h
@@ -448,6 +448,9 @@ enum win_color_depth_id {
 #define LVS_OUTPUT_POLARITY_LOW                BIT(28)
 #define LSC0_OUTPUT_POLARITY_LOW       BIT(24)
 
+/* DC_COM_PIN_OUTPUT_POLARITY3 0x309 */
+#define LSPI_OUTPUT_POLARITY_LOW       BIT(8)
+
 /* DC_COM_PIN_OUTPUT_SELECT6 0x31a */
 #define LDC_OUTPUT_SELECT_V_PULSE1     BIT(14) /* 100b */
 

diff --git a/drivers/video/tegra/dc.c b/drivers/video/tegra/dc.c
index f0e3d2c993fec6b22b2c29b9aa7c007f87e8e83c..ced49718834ff667033fa19fa1ebde3b7f32c94e 100644 (file)
--- a/drivers/video/tegra/dc.c
+++ b/drivers/video/tegra/dc.c
@@ -238,8 +238,24 @@ static void rgb_enable(struct tegra_lcd_priv *priv)
        else
                value &= ~LVS_OUTPUT_POLARITY_LOW;
 
+       /* configure pixel data signal polarity */
+       if (dt->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
+               value &= ~LSC0_OUTPUT_POLARITY_LOW;
+       else
+               value |= LSC0_OUTPUT_POLARITY_LOW;
+
        writel(value, &com->pin_output_polarity[1]);
 
+       /* configure data enable signal polarity */
+       value = readl(&com->pin_output_polarity[3]);
+
+       if (dt->flags & DISPLAY_FLAGS_DE_LOW)
+               value |= LSPI_OUTPUT_POLARITY_LOW;
+       else
+               value &= ~LSPI_OUTPUT_POLARITY_LOW;
+
+       writel(value, &com->pin_output_polarity[3]);
+
        for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++)
                writel(rgb_sel_tab[i], &com->pin_output_sel[i]);
 }