arm64: dts: cix: Add SCMI performance domains for CPUFreq on Sky1

Add SCMI Protocol 13 (Performance) node under ap_to_pm_scmi with
domains.

Define SKY1_PERF_* macros in sky1-power.h for all performance domain
IDs (CPU L/B0/B1/M0/M1, GPU, DSU, NPU, VPU, CI700, NI700), and
wire each CPU node to its corresponding performance domain using
power-domains and power-domain-names properties.

Signed-off-by: Devin Li <Devin.Li@cixtech.com>
Link: https://lore.kernel.org/r/20260506025254.3602623-1-Devin.Li@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>

diff --git a/arch/arm64/boot/dts/cix/sky1-power.h b/arch/arm64/boot/dts/cix/sky1-power.h
index 53f4a3af36b3971fb55543b7b22ff2faa40da850..144567579b7195b21859b801f1ed249198d4bd65 100644 (file)
--- a/arch/arm64/boot/dts/cix/sky1-power.h
+++ b/arch/arm64/boot/dts/cix/sky1-power.h
@@ -30,4 +30,17 @@
 #define SKY1_PD_ISP0           20
 #define SKY1_PD_GPU            21
 
+#define SKY1_PERF_GPU_CORE     0
+#define SKY1_PERF_GPU_TOP      1
+#define SKY1_PERF_CPU_L     2
+#define SKY1_PERF_CPU_B0       3
+#define SKY1_PERF_CPU_B1       4
+#define SKY1_PERF_CPU_M0       5
+#define SKY1_PERF_CPU_M1       6
+#define SKY1_PERF_DSU      7
+#define SKY1_PERF_NPU      8
+#define SKY1_PERF_VPU      9
+#define SKY1_PERF_CI700            10
+#define SKY1_PERF_NI700            11
+
 #endif

diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index bb5cfb1f2113363ff49b55a27f0cfd82663b6d5c..9f80e1aa070a0eec4225058bcc6dbd0089f359ac 100644 (file)
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -22,6 +22,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x0>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
                };
 
@@ -30,6 +32,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x100>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
                };
 
@@ -38,6 +42,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x200>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
                };
 
@@ -46,6 +52,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x300>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
                };
 
@@ -54,6 +62,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x400>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -62,6 +72,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x500>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -70,6 +82,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x600>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -78,6 +92,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x700>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -86,6 +102,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x800>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -94,6 +112,8 @@
                        enable-method = "psci";
                        reg = <0x0 0x900>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -102,6 +122,8 @@
                        enable-method = "psci";
                        reg = <0x0 0xa00>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -110,6 +132,8 @@
                        enable-method = "psci";
                        reg = <0x0 0xb00>;
                        device_type = "cpu";
+                       power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
+                       power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
                };
 
@@ -164,6 +188,11 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
 
+                       scmi_dvfs: protocol@13 {
+                               reg = <0x13>;
+                               #power-domain-cells = <1>;
+                       };
+
                        scmi_clk: protocol@14 {
                                reg = <0x14>;
                                #clock-cells = <1>;