]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net: stmmac: Limit FIFO size by hardware capability
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Mon, 27 Jan 2025 01:38:19 +0000 (10:38 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 8 Feb 2025 09:02:14 +0000 (10:02 +0100)
[ Upstream commit 044f2fbaa2725696ecbf1f02ba7ab0a8ccb7e1ae ]

Tx/Rx FIFO size is specified by the parameter "{tx,rx}-fifo-depth" from
stmmac_platform layer.

However, these values are constrained by upper limits determined by the
capabilities of each hardware feature. There is a risk that the upper
bits will be truncated due to the calculation, so it's appropriate to
limit them to the upper limit values and display a warning message.

This only works if the hardware capability has the upper limit values.

Fixes: e7877f52fd4a ("stmmac: Read tx-fifo-depth and rx-fifo-depth from the devicetree")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Yanteng Si <si.yanteng@linux.dev>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

index 17a5be4f57c8d03cd9c218555cba960d7bfc2cd9..1bed3e7629faabac6dfab46b48b4abb9f0cd31bc 100644 (file)
@@ -7190,6 +7190,21 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
                priv->plat->tx_queues_to_use = priv->dma_cap.number_tx_queues;
        }
 
+       if (priv->dma_cap.rx_fifo_size &&
+           priv->plat->rx_fifo_size > priv->dma_cap.rx_fifo_size) {
+               dev_warn(priv->device,
+                        "Rx FIFO size (%u) exceeds dma capability\n",
+                        priv->plat->rx_fifo_size);
+               priv->plat->rx_fifo_size = priv->dma_cap.rx_fifo_size;
+       }
+       if (priv->dma_cap.tx_fifo_size &&
+           priv->plat->tx_fifo_size > priv->dma_cap.tx_fifo_size) {
+               dev_warn(priv->device,
+                        "Tx FIFO size (%u) exceeds dma capability\n",
+                        priv->plat->tx_fifo_size);
+               priv->plat->tx_fifo_size = priv->dma_cap.tx_fifo_size;
+       }
+
        priv->hw->vlan_fail_q_en =
                (priv->plat->flags & STMMAC_FLAG_VLAN_FAIL_Q_EN);
        priv->hw->vlan_fail_q = priv->plat->vlan_fail_q;